在控制單元(controller) (有限狀態機，finite state machine)的硬體實現中，狀態指派(state assignment)是最重要的問題之一。傳統解決狀態指派的經驗法則評估包括模擬降溫法(simulated annealing, SA)、貪婪方法(greedy approach)和遞迴式最小切割法(recursive Min-Cut partitioning)。我們考量到這些方法大部分是不能同時減少面積和功率的消耗。因此在這篇論文中，我們將提出一個利用整數線性規劃(integer linear programming, ILP)來解決控制器狀態指派的方式。這個整數線性規劃的目標函式主要是利用設定權重(weight)在較少面積與低功率之間做出適當的取捨以得到最佳解，這個方法將可以找出減少控制器面積和功率消耗的最佳編碼。除此之外，同樣的利用整數線性規劃我們還對控制器的輸出訊號作編碼，以減少資料路徑的功率消耗。

最後，我們將所提出的方法實作在MCNC基準測試程式(benchmarks)和控制器資料路徑的系統上，以驗證我們所提出的ILP解決方法的效能。根據實驗數據得知，這個方法確實可以達到在系統效能上功率和面積的節省。

The state assignment is one of the most important problems in hardware implementation of controllers (finite state machines, FSMs). Traditional heuristics include simulated annealing (SA), greedy approach, and recursive Min-Cut partitioning. Since these methods can’t reduce both area and power, thus we propose a new approach which using integer linear programming (ILP) to solve the state assignment. The proposed of ILP approach can set the weight and reach best solution between less area and low power. The approach can find out the best state assignment for both low-area and low power consumption. In addition, we also use ILP to solve the output encoding of controller in order to reduce the power consumption of datapath.

Finally, to verify the effectiveness of our proposed approach, we do some experiments on several MCNC FSM benchmarks and controller-datapath systems. The experimental results show that a significant power and area savings can be achieved.

CHAPTER 1 INTRODUCTION
1.1 Motivation
1.2 Paper Organization
CHAPTER 2 RELATED WORK
2.1 Problem Overview
2.2 Survey
2.3 Design Flow
CHAPTER 3 PREPOSITIVE PROCESS
3.1 Minimum Area
3.1.1 MUSTANG
3.1.1.1 A Fanin-Oriented Algorithm
3.1.1.2 A Fanout-Oriented Algorithm
3.1.1.3 State Assignment by ILP
3.1.2 JEDI
3.2 Minimizing Power Consumption
3.3 MCNC benchmark report
CHAPTER 4 CONTROLLER-DATAPATH SYSTEMS
4.1 Controller-Datapath Architecture
4.1.1 GCD
4.1.2 FIR
4.1.3 HAL
4.2 Graph Model
4.2.1 GCD
4.2.2 FIR
4.2.3 HAL
4.3 ILP State Assignment for Controller Architecture
4.3.1 GCD
4.3.2 FIR
4.3.3 HAL
4.4 Output Encoding
4.4.1 GCD
4.4.2 HAL
4.5 Controller report
4.5.1 GCD
4.5.2 FIR
4.5.3 HAL
4.6 Experiment result
4.6.1 GCD
4.6.2 HAL
CHAPTER 5 CONCLUSION AND FUTURE WORK
5.1 Conclusion
5.2 Future Work
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