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博碩士論文 etd-0724108-160624 詳細資訊
Title page for etd-0724108-160624
論文名稱
Title
應用於可降低金屬效應的射頻辨識標籤天線之縮小化高阻抗表面結構設計
Design of the Miniature High Impedance Surface Structure to Reduce Metallic Effect on the RFID Tag Antenna
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
60
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2008-06-23
繳交日期
Date of Submission
2008-07-24
關鍵字
Keywords
標籤天線、高阻抗表面結構、導體
Tag Antenna, High Impedance Surface Structure, Conductor
統計
Statistics
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中文摘要
摘 要
本研究中將介紹高阻抗表面(HIS)結構的特性、進行薄形化小尺寸高阻抗表面結構的研究與設計。
為了符合射頻辨識系統的IC晶片使用與達到降低金屬導體效應的結果,將在金屬與天線間加入一隔離層,利用此隔離層將天線與背面環境做一區隔,降低環境對天線的影響。此隔離層我們採用週期性結構—「電磁帶隙」(EBG)的方式製作,利用電磁帶隙中的高阻抗表面結構型態製作出一類似磁導體(或反射體)的結構,藉著利用電磁帶隙的結構與特性,以達到天線與環境的隔離效果,並有效抑制金屬效應的影響。
又由於射頻辨識標籤天線有尺寸與低成本的考量因素,因此需設計一縮小化尺寸、低姿態(Low profile)、低成本的高阻抗表面結構。在本研究中利用槽孔與加入晶片電容兩種方法來縮小結構尺寸,兩種方法所設計之縮小化高阻抗表面結構皆具有抑制金屬效應的效果。其中使用槽孔縮小尺寸,雖然可以有效抑制金屬效應,卻不具備低姿態的優點。而使用晶片電容的方法可以有效降低高阻抗表面結構的尺寸,並具有低姿態、低成本、較佳的抑制金屬效應之效果,以及標籤天線對此縮小化結構的頻率偏移現象的敏感性較低。最後藉由模擬與實際製作縮小化高阻抗表面結構並測量與標籤天線結合後的性能,進一步驗證縮小化高阻抗表面結構設計之可能。
Abstract
ABSTRACT
In this study, the properties of the high impedance surface structure are studied. We proceed to design the low profile and miniature high impedance surface structure.
In order to conform to the IC chips of RFID and reduce the influence of metal objects, we add a layer of electromagnetic band-gap (EBG) structure on the back of the antenna. The EBG behaves as a high impedance surface, similar to a perfect magnetic conductor. This property of the EBG structure is able to isolate the antenna and backside environment and reduce the metallic effect.
In order to achieve the requirements of small size and low cost on RFID tag antenna, we design the miniature, low profile and low cost high impedance surface structure. In this study, we use the slots and chip capacitance to miniaturize the dimension. Both approaches can reduce the influence of metallic objects. Although using slots can reduce the metallic effect, it does not have the advantage of low profile. Using chip capacitor can miniaturize the dimension and reduce metallic effect effectively. It also has advantages of low profile, low cost and low sensitivity to the frequency of the tag antenna. Finally, the high impedance surface structures are fabricated and measured when they combine with the tag antenna attached to the metallic object. The measured results agree with simulated ones well.
目次 Table of Contents
目 錄
致謝 …………………………………………………………………………… I
中文摘要 …………………………………………………………………… III
英文摘要 …………………………………………………………………… IV
目錄 ……………………………………………………………………… V
圖表目錄 …………………………………………………………………… VII
第一章 序論
1.1 研究動機 ………………………………………………………… 1
1.2 論文大綱 ……………………………………………………… 2
1.3 研究方法 ……………………………………………………… 2
第二章 射頻辨識系統之工作原理
2.1 射頻辨識系統之工作原理 …………………………………… 3
2.2 影響射頻辨識系統讀取距離之成因 ………………………… 6
第三章 高阻抗表面結構之原理及模擬方法
3.1 高阻抗表面結構之原理與應用 ………………………………… 9
3.2 高阻抗表面基本單位元件之模擬 ………………………… 14
第四章 利用槽孔之縮小化高阻抗表面結構設計
4.1 UHF頻帶射頻辨識標籤天線之設計 ………………………… 17
4.2 利用槽孔設計縮小化高阻抗表面基本單位元件之模擬 …… 20
4.3 利用槽孔之縮小化高阻抗表面結構設計與標籤天線之模擬 ...... 22
4.4 縮小化高阻抗表面結構改良模擬與實作測量 ……………… 25
4.5 縮小化高阻抗表面結構設計之總結 ………………………… 29
第五章 利用晶片電容之縮小化高阻抗表面結構設計
5.1 利用晶片電容設計縮小化高阻抗表面基本單位元件之模擬 ...... 33
5.2 利用晶片電容之縮小化高阻抗表面結構與標籤天線之模擬 ....... 36
5.3 縮小化高阻抗表面結構改良模擬與實作測量 ……………… 40
5.4 縮小化高阻抗表面結構設計之總結 ………………………… 43
第六章 結論 ………………………………………………………………… 46
參考文獻 ……………………………………………………………………… 47
參考文獻 References
參考文獻
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[9] J. Bornemann, “High performance front end GPS module,” p.2. ( http://www.engr.uvic.ca/~atennent/final.pdf )
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