在傳統濾波器,我們經常需求取捨在低電壓和高動態範圍之間，壓縮的濾波器可以解決這一個問題，本篇論文描述CMOS Pseudo指數電路應用於對數領域濾波器，所有MOSFET操作於飽和區，並得高頻域。
濾波器使用小晶片面積和更少MOSFET顆數，濾波器操作電壓3V，截止頻率從3MHz到10MHz，逸散功率1.06mW。
我們先採用Hspice來模擬對數濾波器的諸多特性，以確保該電路設計的準確性及作為設計佈局的參考。在完整的模擬與分析之後，將使用0.35um CMOS 製程製作晶片。

On traditional filters, we usually need a trade off between low-voltage and high dynamic range. The companding filters may solve this problem. This thesis presents a pseudo-exponential third-older low pass filter. All MOSFETs are operated in saturated region to obtain high frequency.
The filter has small chip area and less MOSFETs. The filter has supply voltage of 3V, has cutoff frequency of 3MHz to 10MHz, and 1.06mW power dissipation.
We will first employ Hspice to simulate the log-domain filter to ensure the correctness of the circuit and make it a reliable reference with the circuit layout. After summarizing all the simulations and analyses, the chip has been fabricated with 0.35um CMOS technology.

Chapter1 Introduction..................................................... 1
1.1 Background .........................................................1
1.2 log-domain Filter ..................................................2
1.3 Motivation........................................................................3
1.4 Thesis Organization ...........................................4
Chapter2 Previous Log Filter.................................. 5
2.1 Design Log Filter Circuit .............................................5
2.2 BJT Log-Domain Filter ............................................8
2.3 Bipolar Transistor in Standard CMOS Process ...10
2.4 CMOS Weak Inversion Log-Domain Filter .......12
2.5 The Pseudo-Exponential Filter ........................14
2.5.1 The First-Order Filter ......................................14
2.5.2 The Second-Order Filter ....................................17
Chapter3 The Proposed Circuit...............................18
3.1 The Proposed Third-Order Log-domain Filter .....18
3.2 Positive Transconductance ....................................19
3.3 Negative Transconductance ...................................20
3.4 I/V converter ..............................................................21
3.5 V/I converter ................................................................22
3.6 Transfer Function .............................................24
Chapter4 Simulation and Measurement Results of the Proposed Filter....... 28
4.1 The Circuit Implement, Layout & Specifics ..........28
4.2 Testing method & Measurement circuit ...............31
4.3 Frequency Response ................................32
4.5 Total Harmonic Distortion ...............................35
4.6 Comparisons ..................................................36
Chapter5 Conclusion...................................................... 38
References............................................................... 39

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