本論文主要是設計一超寬頻低雜訊放大器電路，並做了輸入匹配分析、雜訊分析和增益分析。
對於電路的架構設計方法，首先我們利用回授設計，並且此設計有別於傳統退化電感架構，此設計可提升電路的增益並降低雜訊。第二級利用CS架構設計，來提升整體電路增益。輸出級利用源極隨耦器來當輸出匹配。在輸入匹配方面，我們利用電阻回授和電晶體本身的阻抗去達成高頻段匹配。
本研究的低雜訊功率放大器頻寬為6~10 GHz 消耗功率為16.8 mW，輸入反射損耗(S11 )數值為-9.3到-10 dB，輸出反射損耗(S22)數值為-16.83到-13 dB，順向增益(S21)數值為13.8到11.6 dB，逆向隔離度(S12)小於 -30 dB，雜訊指數為2.38到3.31 dB。在6 GHz 時，1 dB 增益壓縮點( 1dB P )為-12.5 dBm，三階
截距點( IIP3 )為-2.5 dBm。

The main contents of this thesis are improving a UWB LNA, and analyze the input-matching, the noise, and the gain.
First we use the feedback of the input transistor , and it different from the traditional source-degeneration inductor.The design can increase the gain and reduce the noise of the circuit.The second stage CS architecture designed to improve the overall gain of the circuit. Output level to use the source follower with the device even when the output matching . In the input matching,we use a shunt inductor and the impedance of the transistor itself to achieve high frequency matching.
The UWB LNA dissipates 16.8 mW power and achieves input return loss (S11) -9.3 to -10 dB, output return loss (S22) -16.83 to -13 dB, forward gain (S21) 13.8 to 11.6 dB, reverse isolation (S12) below -30 dB, and noise figure (NF) of 2.38~3.31 dB over the 6~10 GHz band of interest. 1-dB compression point (P1dB) of -12.5 dBm and input third-order inter-modulation point (IIP3) of -2.5 dBm are achieved at 6 GHz.

致謝 iii
摘要 iv
Abstract v
目錄 vi
圖次 vii
表次 ix
第一章 1
1.2研究動機 2
1.3論文架構 3
第二章 4
2.1簡介 4
2.2雜訊分析 4
2.2.1雜訊指數(Noise Figure) 4
2.2.2 熱雜訊(thermal noise) 6
2.2.3閃爍雜訊(Flicker Noise) 6
2.2.4射雜訊(shot noise) 9
2.3線性度 10
2.3.1 1dB增益壓縮點(1dB gain compression point) 10
2.3.2 三階截距點(Third-order intercept) 11
2.4 穩定性(stability) 12
2.5 輸入匹配架構 15
2.5.1 電感退化性架構(inductive degeneration) 15
2.5.2 電阻性終端架購(resistive termination) 16
2.5.3 轉導終端架構(1/gm termination) 17
2.5.4 並串式回授架構(shunt-series feedback) 17
2.5.5 輸入匹配特性統整 18
2.6 寬頻放大器種類 19
2.6.1 分佈式放大器 19
2.6.2 回授放大器電路架構 20
2.6.3 L-C濾波器匹配放大器 20
2.6.4 平衡式放大器 21
2.6.5 寬頻放大器特性統整 22
2.7 回授放大器的探討 23
2.7.1 一般性考慮 23
2.7.2 電壓-電壓回授(series-shunt) 24
2.7.3 電流-電壓回授(series- series) 25
2.7.4 電壓-電流回授(shunt- shunt) 26
2.7.5 電流-電流回授(shunt- series) 27
第三章 29
3.1 電路架構簡介 29
3.1.1 輸入匹配 30
3.1.2 增益級 33
3.1.3 輸出級 34
3.1.4 雜訊分析 36
第四章 38
4.1 電路設計流程 38
4.2 電路佈局考量 40
4.3 模擬結果 42
4.4 量測與探討 50
第五章 51
5.1 結論 51
參考文獻 52

[1]M. P. Wylie-Green, P. A. Ranta, and J. Salokannel, 2005 ,“Multi-band OFDM UWB solution for IEEE 802.15.3a WPANs,” IEEE/Sarnoff Symposium on Advances in Wired and Wireless Communication, pp.102-105, April.
[2]蔡承修，“3-10GHz 寬頻低雜訊放大器”，國立中央大學電機工程研究所 碩士論文，中華民國九十七年。
[3]魏國峰，“應用於 MB-OFDM UWB 接收機之CMOS 射頻晶片的研製”，國立成功大學電腦與通信工程研究所碩士論文，中華民國九十七年。
[4]張盛富,張嘉展, “無線通訊射頻晶片模組設計-射頻系統篇”,2009.
[5]Davie M. Pozar, “Microwave Engineering”, 2005.
[6]B. Razavi, Design of Analog CMOS Integrated Circuits, McGrawHill 2002.
[7]呂文嘉, “高頻電路分析與設計, ” 全威, 民國85年.
[8]呂文嘉, 袁杰, “高頻電路分析與設計(二),” 全威圖書, 民國86年
[9]Guillermo Gonzalez，Microwave Transistor Amplifiers Analysis and Design，Prentice Hall Upper Saddle River，New Jersey, 1997.
[10]葉宗原“使用共閘級架構之超寬頻低雜訊放大器設計”，國立雲林科技大 學電子工程系碩士論文，中華民國九十八年六月。
[11]謝宜龍“3.1~10.6 GHz CMOS 超寬頻低雜訊放大器”，國立中山大學電機工程學系碩士論文，中華民國100年七月。
[12]呂學士編譯, 本城何彥原著, “微波通訊半導體電路”, 全華科技股份有限公司,2001。
[13]許源佳, “5.2GHz 無線區域網路CMOS 低雜訊放大器之設計”國立暨南國際大學電機工程學系碩士論文, 中華民國九十二年六月七日。
[14] K. Chang, I. Bahl and V. nair, “RF and Microwave Circuit and Component Design for Wireless System”, A John Wiley & Sons, INC. 2002.
[15]柯鈞琳, “Design of CMOS RF IC”, Chip Implementation Center,July-2009.
[16] A. Bevilacqua and A. M. Niknejad, “An ultrawideband CMOS low-noise amplifier for 3.1–10.6-GHz wireless receivers,” IEEE Journal of Solid-State Circuits, Vol. 39, pp. 2259–2268, Dec. 2004.
[17]葉宗軒“使用電阻性回授架構之超寬頻低雜訊放大器設計”，國立雲林科技大學電子工程系碩士論文，中華民國九十九年六月。
[18]Yen Ju The , Choong Foo Chung , M. Annamalai Arasu, “A 3–47dB gain,+20dBm IIP3, 400MHz VGA for a pulse-based UWB in 0.18μm CMOS ,” Integrated Circuits, ISIC '09. Proceedings of the 2009 12th International Symposium on, pp. 437–440, Dec. 2009.
[19]WESTSTRATE M., SINHA S., “Noise optimization of a wideband capacitive shunt-shunt feedback LNA design suitable for software-defined radio”, Proc. of the IEEE International Conference on Electronics, Circuits and Systems, Hammamet, pp. 619-622, 13-16 December 2009.
[20]B. Park, K. Lee and S. Choi, “A receiver front-end design in 0.13 μm CMOS for multiband OFDM UWB system, ” Asia Pacific Microwave Conference, 2009, pp. 241-244.
[21]W. Yu-Lin, et al., “Design and implementation of LNA with high gain and low power consumption for UWB system, ” in Communications, 2009. APCC 2009. 15th Asia-Pacific Conference on, pp. 422-425,2009.
[22]Hsiu-Chun Lai and Zhi-Ming Lin,“A 1V Low Noise Amplifier for WiMAX / UWB Applications,”in Proceedings of the 2008 IEEE Asia Pacific Conference on Circuits and Systems, Macau, pp. 153–155, Dec. 2008.
[23]A. I. A. Galal, R. K. Pokharel, Haruichi Kanay, and Keiji Yoshida, “Ultra-wideband low noise amplifier with shunt resistive feedback in 0.18μm CMOS process ,” Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2010 Topical Meeting on, 2010.
[24]Ruey-Lue Wang, Min-Chuan Lin, Cheng-Fu Yang, Chih-Cheng Lin, “A l V 3.1-10.6 GHz Full-band Cascoded UWB LNA with Resistive Feedback,” Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on,2007.
[25]C. T. Fu, C. N. Kuo, and S. S. Taylor, “low-noise amplifierdesign with dual reactive feedback for broadband simultaneous noise and impedance matching,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 4, pp. 795-806, April 2010.
[26]B. Park, S. Choi, and S. Hong, “A low-noise amplifier withtunable interference rejection for 3.1- to 10.6-GHz UWB system,” IEEE Microw. and Wireless Compon. Lett., vol. 20,no. 1, pp. 40–42, Jan. 2010.
[27]Nischal Koirala, R. K. Pokharel, A.I.A. Galal, H. Kanaya, K. Yoshida, “Design of a Low Noise Amplifier with integrated notch filter for interference rejection in ultra-wideband systems ,” Microwave Conference Proceedings (CJMW), 2011 China-Japan Joint, April 2011.
[28]Zhe-Yang Huang ; Che-Cheng Huang , “CMOS 0.18um Dual-Wideband Low-Noise Amplifier for Ultra-Wideband Wireless Receiver ,” Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. ,2007.
[29]Y.-Ch. Chen and Ch.-N. Kuo, “A 6~10-GHz Ultra-Wideband Tunable LNA”, Conference Proceedings,ISCAS 2005, Kobe, Japan, 5, pp. 5099–5102, 2005.
[30]Zhe-Yang Huang, Che-Cheng Huang2, “CMOS Low-Noise Amplifier for 6-11GHz MB-OFDM UWB Wireless Radio System ,” Integrated Circuits, 2007. ISIC '07. International Symposium on,2007.
[31]Z.-Y. Huang, C.-C. Huang, C.-C. Chen, C.-C. Hung, and C.-M. Chen, “An inductor-coupling resonated CMOS low noise amplifier for 3.1-10.6GHz ultra-wideband system, ”IEEE Int. Symp. Circuits Syst., pp.221-224, May 2009.
[32]Wylie-Green, M.P.; Ranta, P.A.; Salokannel, J.; “Multi-band OFDM UWB solution for IEEE 802.15.3a WPANs”, Advances in Wired and Wireless Communication, 2005 IEEE/Sarnoff Symposium on18-19 April 2005.
[33]Ramzan, R. , Andersson, S. , Dabrowski, J. , Svensson, C. , “A 1.4V 25mW Inductorless Wideband LNA in 0.13μm CMOS ,” Solid-State Circuits Conference, 2007. ISSCC 2007.
[34]P.-Y. Chang and S. Hsu, “A compact 0.1–14-GHz ultra-wideband low-noise amplifier in 0.13-μm CMOS,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 10, pp. 2575–2581, Oct. 2010.
[35]Y. Lin , S. Hsu , J. Jin and C. Chan “A 3.1–10.6 GHz ultra-wideband CMOS low noise amplifier with current-reused technique”, IEEE Microw. Wireless Compon. Lett., vol. 17, pp.232 2007.
[36]R. M. Weng, C. Y. Liu, and P. C. Lin, “A Low-Power Full-Band Low- Noise Amplifier for Ultra-Wideband Receivers, ” IEEE Trans. Microw. Theory Tech., vol. 58, 8, pp. 2077-2083, Aug. 2010.
[37]Y. Lu , K. S. Yeo , A. Cabuk , J. Ma , M. A. Do and Z. Lu “A novel CMOS low-noise amplifier design for 3.1-to-10.6-GHz ultra-wideband wireless receiver”, IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, pp.1683 2006.
[38]T. Chang , J. Chen , L. A. Rigge and J. Lin “ESD-protected wideband CMOS LNAs using modified resistive feedback techniques with chip-on-board packaging”, IEEE Trans. Microw. Theory Tech., vol. 56, pp.1817 2008.