在本論文中As-grown 和H-treated 多晶鑽石薄膜使用P-type表面傳導層的MISFET已經利用新的製程方式被製作出來[1-2]。這個多晶鑽石薄膜MISFET的新的製作方式是利用Shadow Mask和選擇性沈積(SAD)的方式[3]，而這方式具有低的cost和較少的製程步驟等優點。所以這項技術是製造鑽石元件的最佳製程技術之一。

其次，我們提出氫端傳導層的多晶型鑽石薄膜MISFET等效電路模型，而這個等效電路模型包含FET和兩個寄生的傳導路徑。在FET的電流部分指的是流經P-type傳導層的電流，而流經寄生傳導路徑的電流是指越過Metal/diamond的barrier再流到grain boundary 和 bulk diamond兩個部分的電流。此外，這個等效電路模型推導已經成功的模擬出As-grown和H-treated多晶型鑽石薄膜MISFET的I-V特性曲線，而這個模擬結果也和我們的量測結果吻合。此外，在本次研究我們從測量和模擬結果中，可以發現As-grown多晶鑽石薄膜MISFET受grain boundary 和 bulk diamond影響比較大，所以特性曲線較類似二極體的特性曲線; 反之觀看H-treated多晶鑽石薄膜MISFET的I-V特性曲線，顯示受grain boundary 和 bulk diamond影響比較小，所以特性曲線較類似Si-MISFET的特性曲線。這些研究結果相信對於將來作有關鑽石薄膜元件有著相當重要的影響。

In this thesis﹐ As-grown and H-treated polycrystalline diamond film Metal-Insulator-Semiconductor Field-Effect-Transistor on the p-type surface semiconductive layers of undoped hydrogen-terminated CVD diamond films were successfully fabricated using a new fabrication process[1-2]. This new fabrication process of the polycrystalline diamond film MISFET exploits selected area deposition (SAD)[3] with Shadow Mask and indeed possesses low cost and less process﹐so it was a best alternation for diamond device fabrication recently.

Next, a modified equivalent circuit of the polycrystalline diamond film MISFET on the p-type surface semiconductive layers of undoped hydrogen-terminated CVD diamond films is also proposed, which consists of FET and the parasitic current conduction paths. The FET current path represents the currents flowed through the P-type conductive layer, and the parasitic current conductance paths represents the currents flowed through the barrier of metal/diamond and through both of the grain boundary and bulk diamond, respectively. In addition, the I-V characteristics of As-grown and H-treated polycrystalline diamond film MISFET has been successfully simulated by using this modified equivalent circuit. The simulation results show good agreements with the measurement. In addition, the I-V characteristics of As-grown polycrystalline diamond film MISFET, from measurement and simulation results, were great affected by the grain boundaries and bulk diamond crystallites, and their shape is similar to that of Schottky diode. Whereas, the effect of the bulk diamond crystallites and diamond grain boundaries was great decreased after hydrogen plasma treatment and the shape of the I-V characteristics is similar to that of Si-MISFET. This result is believed to have important impacts for the application of diamond device in the nearest future.

目錄

第一章 緒論 1
第二章 鑽石場效電晶體元件的演進 4
2.1 MESFET元件 5
2.1.1 PDP-MESFET 架構 5
2.1.2 PD-MESFET 架構 7
2.1.3 DSC-MESFET 架構 10
2.2 MISFET元件 13
2.2.1 SiO2-MISFET架構 13
2.2.2 其他MISFET架構 14
2.3 結語 17
第三章 鑽石薄膜MISFET的結構與製作 18
3.1 氫端鍵結P型傳導層的結構 19
3.2 氫端鍵結P型傳導層特性的探討 19
3.2.1 P型傳導層形成的原因 19
3.2.2 P型傳導層的電性探討 20
3.3 多晶鑽石薄膜MISFET之製作 20
第四章 鑽石薄膜之物理與電性特性分析 26
4.1 SEM及AFM的分析 26
4.2 Raman光譜儀的分析 31
4.3 XPS光譜儀分析 33
4.4 SIMS分析 35
4.5 電性分析 37
4.6 結論 41
第五章 多晶鑽石薄膜空乏型MISFET電子元件模型之建立
42
5.1 多晶鑽石薄膜MISFET電子元件模型 42
5.1.1 多晶鑽石薄膜MISFET的等效電路 44
5.1.2 等效電路的電流模型 46
5.2 鑽石薄膜空乏式MISFET電子元件模擬結
果與討論
52
5.2.1 As-grown鑽石薄膜MISFET 52
5.2.2 H-treated鑽石薄膜MISFET 55
5.3 討論 57
5.4 結論 61
第六章 未來及後續研究展望 62
第七章 結論 67
參考文獻 69










表目錄

表2-1 鑽石之分類 4
表2-2 矽、砷化鎵及鑽石之電性比較 5
表3-1 多晶鑽石薄膜的成長條件 21
表5-1 As-grown和H-treated多晶鑽石薄膜MISFET的模擬資料
53
表5-2 As-grown鑽石薄膜MISFET模擬值之整理 55
表5-3 H-treated鑽石薄膜MISFET模擬值之整理 57
表5-4 鑽石薄膜MISFET分類 57
圖目錄

圖2.1 PDP-MESFET的基本架構及硼摻雜的濃度對深度的分佈圖
6
圖2.2 PDP-MESFET的製作流程 7
圖2.3 PD-MESFET的基本架構 8
圖2.4 PD-MESFET的製作流程 9
圖2.5 DSC-MESFET的基本結構圖 10
圖2.6 DSC-MESFET的製作流程 12
圖2.7 SiO2-MISFET的基本結構圖 13
圖2.8 SiO2-MISFET的製作流程 15
圖2.9 使用undoped diamond當閘極絕緣層的MISFET之基本結構圖
16
圖2.10 使用CaF2當閘極絕緣層的MISFET之基本結構圖
16
圖3.1 多晶鑽石薄膜MISSFET的基本結構圖 18
圖4.1 As-grown diamond film的SEM圖形 27
圖4.2 H-treated diamond film的SEM圖形 28
圖4.3 As-grown diamond film的AFM圖形 29
圖4.4 H-treated diamond film的AFM圖形 30
圖4.5 鑽石薄膜Raman圖形 32
圖4.6 鑽石薄膜XPS圖形 34
圖4.7 鑽石薄膜SIMS圖形 36
圖4.8 多晶鑽石薄膜(Al/SiO2-Au)接點之電流對電壓特性曲線
38
圖4.9 多晶鑽石薄膜(Au-Au)接點之電流對電壓特性曲線
39
圖4.10 多晶鑽石薄膜MISFET之Ids-Vds特性曲線 40
圖5.1 鑽石薄膜空乏式MISFET等效電路圖 43
圖5.2 Metal/diamond的表面能帶圖 45
圖5.3 鑽石薄膜MISFET剖面圖 47
圖5.4 As-grown 多晶型鑽石薄膜MISFET 54
圖5.4 H-treated 多晶型鑽石薄膜MISFET 56
圖5.5 Metal-SiO2-Hydrogen-terminated Diamond的能帶圖
59
圖5.6 Metal-SiO2-Hydrogen-terminated Diamond的熱平衡下能帶圖
60





























附圖目錄

附圖3.1 利用Shadow Mask作選擇性沈積技術所製
作而成的MISFET製作程序圖
23
附圖6.1 SOD-MOSFET的製程步驟 64

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