本論文提出JPEG 2000所採用EBCOT (Embedded Block Coding with Optimized Truncation)演算法的硬體架構實現。我們也以硬體實現為目的，修改了EBCOT演算法，其有效降低記憶體使用量，達到即時編碼及有效提昇效能等優點。修改過的EBCOT編碼器硬體架構較原始EBCOT架構在記憶體需求上，減少40%，且其輸出效能為原始架構之３倍。

This thesis proposes several hardware implementation approaches for the EBCOT (Embedded Block Coding with Optimized Truncation) algorithm, one of the key operations in the emerging JPEG 2000 standard. We also modify the EBCOT algorithm in order to reduce the memory requirement and to improve the speed performance. The modified EBCOT encoder saves 40% memory area with triple speed performance compared to the original design.

CHAPTER 1 導論 1
1.1 論文架構 1
1.2 動機 1
1.3 相關論文 2
CHAPTER 2 相關研究 3
2.1 EZW演算法 3
2.2 SPIHT演算法 6
2.3 EZW演算法相關架構 8
2.3.1. VLSI Architecture For Embedded Zerotree Wavelet Algorithm [3]： 8
2.3.2. VLSI Architecture for Very High Resolution Scalable Video Coding Using the Virtual Zero Tree [4]： 9
2.3.3. A Fast and Area-efficient VLSI Architecture for Embedded Image Coding [5]: 12
2.3.4. 變形演算法之架構： 13
CHAPTER 3 EBCOT演算法 18
3.1 基本觀念 18
3.2 兩階段編碼(TWO TIER CODING) 19
3.2.1. Tier 1：Block Coding 19
3.2.2. Tier 2：Rate-Distortion Optimization 24
3.2.3. Modified EBCOT Encoder 25
3.2.4. 編碼範例 27
3.3 解碼(EBCOT DECODING) 31
CHAPTER 4 架構 36
4.1 EBCOT ENCODER硬體架構 36
4.2 MODIFIED EBCOT ENCODER 處理器架構 45
4.3 RATE CONTROL OF MODIFIED EBCOT ENCODER 55
4.4 MODIFIED EBCOT DECODER 硬體架構 55
CHAPTER 5 結果與討論 58
CHAPTER 6 未來展望 62
參考文獻 63

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[4] L.-M. Ang, et al.,"VLSI Architecture for Very High Resolution Scalable Video Coding Using the Virtual Zero Tree", Proc. of IEEE Workshop on Signal Processing Systems, pp. 131-140, Oct.1999.
[5] J.Bae and V. K. Prasanna,"A Fast and Area-efficient VLSI architecture for embedded image coding", Proceedings International Conference on Image Processing, Vol 3, Oct. 1995
[6] Yu-Chin Tai, “VLSI Design and Implementation of Embedded Zerotree Wavelet Image CODEC with Digital Watermarking”, Master thesis, National Sun Yat-Sen University, 2000.
[7] K.F. Chen, C.J. Lian, H.H. Chen, and L.G. Chen “Analysis and Architecture Design of EBCOT for JPEG-2000”, Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on , Volume: 2 , 2001 Page(s): 765 -768.