由於三五族半導體(砷化鎵(GaAs)，磷化銦(InP)，砷化銦鎵(InGaAs))具有高的電子遷移率，所以被廣泛應用在高速元件上。另外，因為TiO2 與GaAs, InP和InGaAs 擁有良好的晶格匹配特性以及高的介電常數(k = 35-100)，所以我們選擇TiO2 作為閘極氧化層薄膜，且因Al2O3具有高的能隙(Eg = 9 eV)與自我清潔能力(Self-cleaning)，故利用氧化鈦與氧化鋁堆疊層來抑制漏電流，並提高電容值。
三五族半導體因其不穩定的原生氧化層(native oxide)使其擁有高的界面能態密度(interface state density, Dit)而影響界面品質，造成C-V 曲線有拉伸(stretch-out)的現象以及高的漏電流。使用原子層沉積系統(ALD)在基板上生長之氧化鈦(TiO2)與氧化鋁(Al2O3)薄膜，藉由堆疊的雙層結構其氧化鈦之較高介電常數，與氧化鋁較大之能隙與自我清潔能力來改善單層的缺點，降低漏電流。
利用硫化銨((NH4)2S)水溶液對三五族半導體進行表面硫化處理(S-III-V Compound)可以有效去除原生氧化層以及填補半導體表面懸鍵，形成硫原子鍵結薄膜，使其界面品質大幅改善，故在漏電流方面可大為改善。其漏電流分別降至電場分別為7.31 x 10-7，3.11 x 10-6 與7.40 x 10-7 A/cm2 at ±2.0MV/cm。因此，對於三五族半導體之元件製備過程中，藉由硫化處理以鈍化表面形成硫化薄膜為必要之步驟。

Due to the high electron mobility compared with Si, much attention has been focused on III-V compound semiconductors (gallium arsenide (GaAs), indium phosphide (InP), indium gallium arsenide (InGaAs)) high-speed devices. The high-k material TiO2 not only has high dielectric constant (k =35-100) but also has well lattice match with GaAs, InP and InGaAs substrate. Therefore, titanium oxide (TiO2) was chosen to be the gate oxide in this study, and aluminum oxide (Al2O3) has high bandgap (Eg~9eV) and self-cleaning capability, we use TiO2 and Al2O3 stack layers to decrease leakage currents and increase capacitance.
The major problem of III-V compound semiconductor is known to have poor native oxide on it leading to the Fermi level pinning at the interface of oxide and semiconductor. The C-V stretch-out phenomenon can be observed and the leakage current is high. Use atomic layer deposition (ALD) system to grow stack double layers ALD-TiO2 and ALD-Al2O3 films on III-V substrate by high-k of TiO2 and high bandgap and self-cleaning capability of Al2O3 to reduce only one layer’s defect.
The surface passivation of III-V with (NH4)2S treatment (S-III-V) could prevent it from oxidizing after cleaning and improve the interface properties of MOSFET. The leakage current of sulfur passivation can be improved. The leakage current densities are 7.31 x 10-7, 3.11 x 10-6 and 7.40 x 10-7 A/cm2 at ±2.0MV/cm, respectively. The (NH4)2S is necessary to passivation III-V surface form S-thin film of fabrication of III-V devices.

論文審定書 i
ACKNOWLEDGMENT ii
摘 要 iii
ABSTRACT iv
CONTENTS v
LIST OF FIGURES vii
LIST OF TABLES x
Introduction 1
1-1 Developments in Gate Dielectric 1
1-2 Properties of TiO2 3
1-3 Comparison of deposition methods of TiO2 4
1-4 Advantages of ALD 5
1-5 Drawback of TiO2 for MOSFETs 6
1-6 Mechanism and the structure model of InP and GaAs with sulfur treatment 7
1-7 ALD Al2O3/TiO2 on (NH4)2S treated III-V compound semiconductor structure 9
1-8 Mechanism of Transmission Line Model 10
Experiments 20
2-1 Titanium oxide and Aluminum oxide are prepared by MOCVD and ALD 20
2-1-1 CVD theorem 20
2-1-2 Deposition system of MOCVD and ALD 21
2-1-3 Properties of source materials 23
2-2 Deposition procedures of MOS structure 24
2-2-1 GaAs and InP wafer cleaning and sulfidation procedures 24
2-2-2 InGaAs wafer cleaning and sulfidation procedures…..………...25
2-2-3 Preparation of Al2O3/TiO2 stack films 26
2-2-3-1 Growth parameters of ALD-TiO2 film 26
2-2-3-2 Growth parameters of ALD-Al2O3 film 26
2-2-4 Aluminum metal and In-Zn alloy cleaning processes 27
2-2-5 Electrodes fabrication 27
2-3 Characterization 27
2-3-1 Physical Properties 27
2-3-2 Electrical Properties 28
Characterization 34
3-1 Characterization of ALD Al2O3/TiO2 film on InP 34
3-1-1 TEM cross section of Al2O3/TiO2/S-InP structures 34
3-1-2 I-V characteristics of Al2O3/TiO2 Stacked Dielectrics on (NH4)2S treated InP 34
3-1-3 C-V characteristics of Al2O3/TiO2 Stacked Dielectrics on (NH4)2S treated InP 35
3-2 Characterization of ALD TiO2/Al2O3 film on GaAs 37
3-2-1 TEM cross section of TiO2/Al2O3/S-GaAs structures 37
3-2-2 I-V characteristics of TiO2/Al2O3 Stacked Dielectrics on (NH4)2S treated GaAs 37
3-2-3 C-V characteristics of TiO2/Al2O3 Stacked Dielectrics on (NH4)2S treated GaAs 38
3-3 Characterization of ALD TiO2/Al2O3 film on InGaAs 40
3-3-1 TEM cross section of TiO2/Al2O3/S-InGaAs structures 40
3-3-2 I-V characteristics of TiO2/Al2O3 Stacked Dielectrics on (NH4)2S treated InGaAs 40
3-3-3 C-V characteristics of TiO2/Al2O3 Stacked Dielectrics on (NH4)2S treated InGaAs 41
3-4 Conclusion 42
Enhancement-mode n-channel MOSFET 51
4-1 Fabrication process of enhancement-mode n-channel MOSFET 51
4-2 Electrical characteristics of enhancement-mode MOSFET 52
4-2-1 Electrical characteristics of enhancement-mode MOSFET with ALD-Al2O3/ALD-TiO2 as gate oxide on S-InP 52
4-2-2 Electrical characteristics of enhancement-mode MOSFET with ALD-TiO2/ALD-Al2O3 as gate oxide on S-GaAs 54
4-2-3 Electrical characteristics of enhancement-mode MOSFET with ALD-TiO2/ALD-Al2O3 as gate oxide on S-InGaAs 55
Conclusions 66
References 69

LIST OF FIGURES
Figure 1-1 The Moore's Law 12
Figure 1-2 Basic characteristics of high-k dielectrics 12
Figure 1-3 Crystal structures of TiO2 (a) Rutile, (b) Anatase, and (c) Brookite 13
Figure 1-4 The mechanism of ALD growth 16
Figure 1-5 Schematic views of the proposed structure models for the InP(001):S surface: a)~d) sulfur-rich structure and e), f) sulfur- poor structures 17
Figure 1-6 (1) Srivastava structure, (2) Inverse Srivastava structure, (3) Pashley structure and (4) Inverse Pashley structure 18
Figure 1-7 Three-dimensional atomic structures of GaAs surface before and after (NH4)2S treatment 19
Figure 2-1 Steps involved in a CVD processes 30
Figure 2-2 MOCVD system 30
Figure 2-3 Schematic growth system of ALD 31
Figure 2-4 Vapor pressure curve of Ti(i-OC3H7)4 31
Figure 2-5 The growth sequence 32
Figure 2-6 The structure for electrical measurement. 33
Figure 3-1 Image of HR-TEM of 3 nm Al2O3 and 5 nm TiO2 on S-InP 43
Figure 3-2 Leakage current densities of TiO2/InP, TiO2/S-InP and Al2O3/TiO2/S-InP MOS structures 43
Figure 3-3 Capacitance–voltage characteristics of TiO2/InP, TiO2/S-InP, and Al2O3/TiO2/S-InP MOS structures. 44
Figure 3-4 Frequency dependent C-V characteristics. (a)TiO2/InP MOS structure, (b) TiO2/S-InP MOS structure, (c)Al2O3/TiO2/S-InP MOS structure 45
Figure 3-5 Image of HR-TEM of 5 nm TiO2 and 3 nm Al2O3 on S-GaAs 46
Figure 3-6 Leakage current densities of TiO2/GaAs, TiO2/S-GaAs and TiO2/Al2O3/ S-GaAs MOS structures 46
Figure 3-7 Capacitance–voltage characteristics of TiO2/GaAs, TiO2/S-GaAs and TiO2/Al2O3/ S-GaAs MOS structures. 47
Figure 3-8 Frequency dependent C-V characteristics. (a)TiO2/GaAs MOS structure, (b) TiO2/S-GaAs MOS structure, (c) TiO2/Al2O3/S- GaAs MOS structure 48
Figure 3-9 Image of HR-TEM of 5 nm TiO2 and 3 nm Al2O3 on S-InGaAs 49
Figure 3-10 Leakage current densities of TiO2/InGaAs, TiO2/S-InGaAs and TiO2/Al2O3/ S-InGaAs MOS structures 49
Figure 3-11 Capacitance–voltage characteristics of TiO2/InGaAs, TiO2/S-InGaAs and TiO2/Al2O3/S-InGaAs MOS structures. 50
Figure 4-1 Steps of MOSFET fabrication process 59
Figure 4-2 MOSFET top view 60
Figure 4-3 ID-VD of e-mode S-InP NMOSFET with ALD-Al2O3/ALD-TiO2 as gate oxides 61
Figure 4-4 ID-VG of e-mode S-InP NMOSFET with ALD-Al2O3/ALD-TiO2 as gate oxides` 61
Figure 4-5 gm as function of VG of e-mode S-InP NMOSFET with ALD-Al2O3/ALD-TiO2 as gate oxides 62
Figure 4-6 ID-VD of e-mode S-GaAs NMOSFET with ALD-TiO2/ALD-Al2O3 as gate oxides 62
Figure 4-7 ID-VG of e-mode S-GaAs NMOSFET with ALD-TiO2/ALD-Al2O3 as gate oxides 63
Figure 4-8 gm as function of VG of e-mode S-GaAs NMOSFET with ALD-TiO2/Al2O3 as gate oxides 63
Figure 4-9 ID-VD of e-mode S-InGaAs NMOSFET with ALD-TiO2/ALD-Al2O3 as gate oxides 64
Figure 4-10 ID-VG of e-mode S-InGaAs NMOSFET with ALD-TiO2/ALD-Al2O3 as gate oxides 64
Figure 4-11 gm as function of VG of e-mode S-InGaAs NMOSFET with ALD-TiO2/ALD-Al2O3 as gate oxides 65


LIST OF TABLES
Table 1-1 Comparison of crystal structures of TiO2 14
Table 1-2 Comparison of deposition methods of TiO2 15
Table 2-1 Bond energies of various gaseous molecules with N or O atoms 32
Table 2-2 The growth process of ALD-TiO2 films 33

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