Responsive image
博碩士論文 etd-0726115-155146 詳細資訊
Title page for etd-0726115-155146
論文名稱
Title
封裝基板極細線路之訊號完整性分析
A Study on Signal Integrity of Fine Lines in Package Substrate
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
75
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2015-08-17
繳交日期
Date of Submission
2015-08-26
關鍵字
Keywords
訊號完整性、粗糙度、差動傳輸線、被動式等化器、共模雜訊
Common mode noise, Signal integrity, Roughness, Passive equalizer, Differential pair
統計
Statistics
本論文已被瀏覽 5775 次,被下載 198
The thesis/dissertation has been browsed 5775 times, has been downloaded 198 times.
中文摘要
隨著科技的進步,電路密度逐年的提高,為了在有限空間內增加訊息的傳遞量,就必須要縮減傳輸線的線寬,進而衍生出許多訊號完整性問題,本論文的研究是探討封裝基板上極細線路傳輸線可能引起的問題,先是分析其電氣特性,並決定傳輸線的架構,介紹粗糙度的影響,再來探討極細線路傳輸線的訊號完整性問題,歸納出單端傳輸線與差動傳輸線的設計準則,並且提出了一被動式等化器設計來增強訊號的表現,主要是利用極細線路傳輸線高電阻的特性,藉由提高特性阻抗,使頻率響應表現更為平坦,這個簡單設計概念,不僅能提升傳輸質量,更不會增加結構的複雜度,還能有效的降低製造成本,對於差動傳輸線的適用性,則是利用TDT共模雜訊分析法來分析,最後透過眼圖的結果來驗證對於訊號的傳遞品質的改善程度。
Abstract
With the advance of IC manufacturing process, the density of circuit gets higher year by year. In order to increase the amount of transmitted information in limited space, it must reduce the width of transmission line. This phenomenon will induce the problem of signal integrity (SI). This thesis considers the problems which may be caused by the fine transmission line on package board. The electric characteristic of fine line will be first analyzed. Also to decide the structure of transmission line and introduce the effect of roughness. And then, we consider the signal integrity of fine line. The design guide of single line and differential line will be proposed. We propose a passive equalizer which uses the high resistance of fine line to enhance the performance of signal, by raising the characteristic impedance to make the frequency response more steady. This simple conception enhances the signal property and does not increase the complexity of structure. It also reduces manufacturing cost efficiently. We apply TDT common mode noise analysis to judge the adaptability of differential line. At last, we use the eye diagram to confirm the signal quality improvement.
目次 Table of Contents
論文審定書 i
致謝 ii
摘要 iii
Abstract iv
目錄 v
圖表目錄 vii
第一章 緒論 1
1.1 研究背景 1
1.2 研究目的與方法 2
1.3 論文大綱 3
第二章 封裝的演進與訊號完整性問題 4
2.1 封裝技術的演進 4
2.1.1 腳位數量的變遷 4
2.1.2基板與印刷電路板的連接 5
2.1.3 晶片與基板的連接方式 6
2.2 晶片的整合技術 8
2.2.1 系統單晶片 8
2.2.2 系統級封裝 9
2.2.3 三維積體電路 10
2.3 極細線路傳輸線的必要性 12
2.4 高頻封裝電路的電氣特性 15
2.4.1 反射效應 17
2.4.2 串音效應 18
2.4.3 有損傳輸線理論 19
第三章 極細線路傳輸線的電氣特性 25
3.1 極細線路傳輸線的特性 25
3.1.1 傳輸線架構的選擇 25
3.1.2極細線路傳輸線的特性阻抗 27
3.1.3 極細線路差分線 30
3.2 粗糙度 32
3.2.1 粗糙度的成因 32
3.2.2 粗糙度的模型 33
3.2.3 粗糙度的影響 37
第四章 極細線路傳輸線的訊號完整性分析 40
4.1 單端傳輸線的設計準則 40
4.1.1 傳輸線間距與介質厚度的關係 40
4.1.2 介質材料的選擇 42
4.1.3 接地迴路的線寬選擇 43
4.1.4 導體厚度的探討 45
4.2 差分傳輸線的設計準則 47
4.3 被動式等化器的設計概念 49
4.3.1 設計原型 51
4.4 結果與討論 54
第五章 結論 62
文獻探討 63
參考文獻 References
[1] Kapur Pawan, Saraswat K.C, “Minimizing Power Dissipation in Chip to Chip Optical Interconnects using Optimal Modulators and Laser Power, ” IEEE Interconnect Technology Conference, June 2003, pp.224-226.
[2] NVIDIA GeForce 8800 GPU Architecture Overview, 2006
[3] 林俊淵、周嘉奕等,CUDA輕鬆上手-新世代GPU應用技術(初版),2012:
松崗資產管理股份有限公司。
[4] “Signal Integrity – Simplified, Eric Bogatin,” Prentice Hall PTR, 2013.
[5] L. L. Yeap, “Meeting the Assembly Challenges in New Semiconductor Packaging
Trend,” in Electronic Manufacturing Technology System (IEMT), 2010 34th IEEE/CPMT International, 2010, pp. 1-5.
[6] The AMD Radeon R6(Mullins),
http://www.notebookcheck.net/AMD-Radeon-R6-Mullins.115398.0.html
[7] P. Garrou, C. Bower, and P. Ramm, Handbook of 3D Integration: Technology and Applications of 3D Integrated Circuits, New York: Wiley, Oct. 2008.
[8] 劉建惟,2013『Application Trend and Fabrication Introduction of 3D Integrated Circuits through Silicon Vias Technology』,國家奈米元件實驗室奈米通訊,20卷 3期,20~27頁。
[9] 唐經洲,2010『封面故事:垂直堆疊優勢多3D IC倒吃甘蔗』,新通訊元件雜誌,3月號109期。
[10] G.E. Moore, “Cramming More Components onto Integrated Circuits,” Electronics, vol. 38, no. 8, 1965, pp. 114&ndash, 117.
[11] The AMD Radeon R9 Fury X Review,
http://www.anandtech.com/show/9390/the-amd-radeon-r9-fury-x-review
[12] D. M. Pozar, “Microwave engineering, 2nd Ed.,” John Wiley & Sons, Inc., 1998, Ch. 2
[13] T. Kitazawa, “Propagation Characteristics of Coplanar-Type Transmission Lines with Lossy Media,” IEEE Microwave and Guided Wave Letters, vol. 39, no. 10, pp. 1694-1700, 1991.
[14] G. Ghione, “A CAD-Oriented Analytical Model for the Losses of General Asymmetric Coplanar lines in Hybrid and Monolithic MICs,” IEEE MTT-S ,vol. 41 no. 9 pp. 1499-1510, 1993.
[15] R.N.Simons, Coplanar Waveguide Circuits, Components, and Systems, A John Wiley & Sons, Inc., Publication, pp.203-217, 2001.
[16] C.L. Holloway, and E.F. Kuester, “Quasi- closed Form Expression for Conductor Loss of CPW Lines,” IEEE Trans. Microwave Theory Tech., vol. 43, no. 12, pp. 2695-2701, 1995.
[17] A. K. Verma, Nasimuddin and H. Singh, “Conductor Loss of the Coplanar Waveguide with Conductor Backing and Top Shield,” APMC, 2004.
[18] L. Lewin, “A Method of Avoiding the Edge Current Divergence in Perturbation Loss Calculations,” IEEE Trans. Microwave Theory Tech., vol. MTT-32, pp. 717–719, July 1984.
[19] L. A. Vainshtein and S. M. Zhurav, “Strong Skin Effect at the Edges of Metal Plates,” Sov. Tech. Phys. Lett., vol. 12, no. 6, pp. 298–299, 1986.
[20] C. L. Holloway and E. F. Kuester, “Edge Shape Effects and Quasiclosed Form Expressions for the Conductor Loss of Microstrip Lines,” Radio Sci., vol. 29, no. 3, pp. 539-559, 1994.
[21] S. H. Hall and H. L. Heck, Advanced Signal Integrity for High-Speed Digital Designs, John Wiley & Sons , Inc., 2009.
[22] S. P. Morgan Jr., “Effect of Surface Roughness on Eddy Current Losses at Microwave Frequencies,” Journal of applied physics 20 (April 1949): 352-62.
[23] Hammerstad and Jensen, “Accurate Models for Microstrip Computer Aided Design,” IEEE MTT-S Int. Microwave Symposium Dig., May 1980, pp. 407-409.
[24] P. G. Huray, S. Hall, S. G. Pytel, F. Oluwafemi, R. Mellitz, D. Hua, and P. Ye, “Fundamentals of a 3-D‘Snowball’Model for Surface Roughness Power Losses,” Proceedings of the IEEE Conference on Signals and Propagation on Interconnects, May 14, 2007, Genoa, Italy.
[25] J. Shin and K. Aygun, “On-package Continuous-time Linear Equalizer using Embedded Passive Components,” in Proc. IEEE Symp. Electr. Perform. Electron. Packag., Oct., 2007, pp.147-150.
[26] Y-J Cheng, H-H Chuang, C-K Cheng, T-L Wu, “Novel Differential-Mode Equalizer With Broadband Common-Mode Filtering for Gb/s Differential-Signal Transmission,” IEEE Trans. Compon. Packag. Manuf. Technol., vol. pp, no.99 2013.
[27] Jongbae Park, Myunghyun Ha, Qin Li, “DDR Memory Channel Design from Passive Stub Equalizer Perspective,” DesignCon2013.
[28] E. Song, J. Cho, H. Kim and J. Kim, “Modeling and Design Optimization of a Wideband Passive Equalizer on PCB Based on Near-end Crosstalk and Reflections for High-speed Serial Data Transmission,” IEEE Trans. Electromagn. Compat., vol. 52, no. 2, pp. 410-420, May 2010.
[29] Gazda, C. Vande Ginste, D. Rogier, H. Ruey-Beei Wu, De Zutter, “A Wideband Common-Mode Suppression Filter for Bend Discontinuities in Differential Signaling Using Tightly Coupled Microstrips,” IEEE Transactions on Advanced Packaging, Vol. 33, No. 4, November 2010.
電子全文 Fulltext
本電子全文僅授權使用者為學術研究之目的,進行個人非營利性質之檢索、閱讀、列印。請遵守中華民國著作權法之相關規定,切勿任意重製、散佈、改作、轉貼、播送,以免觸法。
論文使用權限 Thesis access permission:自定論文開放時間 user define
開放時間 Available:
校內 Campus: 已公開 available
校外 Off-campus: 已公開 available


紙本論文 Printed copies
紙本論文的公開資訊在102學年度以後相對較為完整。如果需要查詢101學年度以前的紙本論文公開資訊,請聯繫圖資處紙本論文服務櫃台。如有不便之處敬請見諒。
開放時間 available 已公開 available

QR Code