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論文名稱 Title |
覆晶封裝殘錫改善與製程能力控制之分析 Flip Chip Solder Residual Improvement and Process CPK Control Analysis |
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系所名稱 Department |
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畢業學年期 Year, semester |
語文別 Language |
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學位類別 Degree |
頁數 Number of pages |
111 |
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研究生 Author |
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指導教授 Advisor |
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召集委員 Convenor |
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口試委員 Advisory Committee |
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口試日期 Date of Exam |
2007-07-19 |
繳交日期 Date of Submission |
2007-07-28 |
關鍵字 Keywords |
覆晶封裝、殘錫改善 flip chip, solder residual improvement |
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統計 Statistics |
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中文摘要 |
隨著半導體技術的進步,元件的尺寸不斷地縮小,而進入深次微米,覆晶封裝的技術是以小元件連接到基板上,且不同於傳統的打金線連接,覆晶封裝是以Solder bump做連接所以I/O能均勻的分佈在Chip的表面,且不緊在Chip周圍也一樣更能縮小尺寸且達到最佳的排列組合,同時不需要金線的組合, 而覆晶封裝的Solder bump定義是指Solder ball植在覆晶封裝的基板上。 本論文主要是研究在植球製程上,研究如何改善Solder Ball的推球強度,殘錫能力及製程能力的控制,並研究及分析其中Failure產生的原因,並且利用工具的協助,目的是為了要解決植球製程上發生的Failure,這些技術包含了: 1. 工程統計法(JMP)、2. 解問題方法(PSM),3. 製程Window最佳化方法,4. 機械設定分析原理, 5. 製程能力&材料特性的管控等、而都是為了改善這些的Failure。 最後, 結果顯示覆晶封裝的製程及SMT的製程上將在封裝上大量的製造。 |
Abstract |
With the progress of the semiconductor technology, the devices scaling down to submicron range leads to increase I/Os number and very fine pitch IC package type; such as BGA, Flip Chip and CSP type packages. For Flip chip packaging, the solder bumping process act as the role of I/O interconnection instead of conventational wirebonding process. The ball mounted process is defined as the solder ball mounted on the Flip Chip Ball Grad Array (FC-BGA) substrate for solder bumping. In this study, how to improve the strength of ball-shear; residual tin capability and capability of process kit are the main issues to be investigated for the ball mounted process. To analyze the root cause and to implement the corrective action are the important purpose for solving the failures occurred on the ball mounted process. The following technologies included as (1) engineering ststictic methodology; JMP (statistical software) (2) Problem solving methodology (PSM) (3) Optimizing the process window (4) Set up the main parameters to analyse in machinery (5) how to monitor the CPK capability & material properties analysis, are used for these issues. Finally, the ball mounted process has been successfully investigated and results in solving the failure of Flip Chip ball mounted process and surface mounted technology (SMT) process for assembly packaging manufacture completely. |
目次 Table of Contents |
目錄 致謝 I 中文摘要 III 英文摘要 IV 目錄 VI 附圖目錄 XII 附表目錄 XIII 第一章 緒論 1 1-1前言 1 1-2發展歷史 2 1-2-1 IC封裝演進趨勢 2 1-2-2 IC封裝階層演進趨勢 3 1-3研究動機 3 1-3-1 Flip Chip 應用的優勢 3 1-3-2 Flip Chip覆晶封裝IC黏著與連接 4 1-4本文各章之介紹 4 第二章 理論基礎 5 2-1覆晶封裝製程 5 2-1-1覆晶封裝流程介紹 6 2-1-2覆晶封裝結構介紹 6 2-1-3覆晶封裝&傳統封裝結構比較 7 2-2 增加錫球結合強度之研究方法 7 2-2-1 增加錫球結合強度研究方法 7 2-2-2要因魚骨圖分析 7 2-3 材料特性及種類 8 2-3-1 助銲劑成份 8 2-3-2助銲劑活性分析 9 2-3-3 錫球種類重量分析 9 2-3-4 錫球Wettability特性 9 2-3-5植球墊種類 9 2-4 推拉球強度測試種類 11 2-4-1 推球測試(Ball shear test) 11 2-4-2 拉球測試(Ball pull test) 11 2-4-3 植球良率判定(First pass yield) 12 2-4-4 植球重工率判定(Rework rate) 12 2-5 殘錫Failure mode種類 12 2-5-1 推球殘錫Failure mode 12 2-5-2 拉球殘錫Failure mode 12 2-5-3 Solder ball void fail mode 13 2-6 推拉球強度規格種類 13 2-6-1 推球殘錫強度規格 13 2-6-2 拉球殘錫強度規格 13 2-7研究範圍&理論 14 2-7-1 BGA 植球墊污染異常及殘錫optimum研究分析…..14 2-7-2 BGA 植球Reflow Profile optimum研究分析 15 2-7-3 BGA植球推球製程能力控制 16 2-7-4 BGA推球參數分析(Ball Shear Parameter verify) 16 2-7-5 BGA錫球&助銲劑Q time管控 17 2-7-6 BGA錫球Void Improvement 18 2-8 製程研究理論 19 2-8-1 預熱溫度(A point) 20 2-8-2 預熱時間(B point) 20 2-8-3 昇 溫 率: (C point) 20 2-8-4 最高溫度(D point) 21 2-8-5 迴焊時間(E point) 21 2-8-6 降 溫 率(F point) 21 2-8-7 熔點: (T point) 22 2-8-8 植球前助銲劑預洗 22 2-8-9 植球Reflow Profile optimum 22 2-8-10 植球推球製程能力控制 22 2-8-11 錫球&助銲劑Q time管控 23 第三章 本論文實驗方法與儀器設備 24 3-1 實驗流程 24 3-2實驗材料與儀器設備 25 3-2-1 實驗材料 25 3-2-2 儀器設備 25 3-3實驗操作步驟 26 3-3-1 基板烘烤步驟 26 3-3-2 增加助銲劑量方法操作步驟 26 3-3-3延長迴銲時間操作步驟 27 3-3-4植球前助銲劑預洗操作步驟 27 3-3-5植球Reflow Profile optimum操作步驟 28 3-3-6植球BGA植球推球製程能力控制操作步驟 28 3-3-7 BGA錫球&助銲劑Q time管控操作步驟 28 3-3-8 BGA Solder Valume管控步驟 29 3-4 量測儀器與其原理 29 3-4-1 EDX 分析儀 (EDX Machine) 29 3-4-2 IMC 分析 30 3-4-3 Cross Section 分析 31 3-5 EDX量測儀器之原理 32 3-5-1 EDX之原理 32 3-5-2 EDX之機台名稱 32 3-5-3 EDX分析結果 32 第四章 結果與討論 34 4-1 BGA 植球墊污染異常及殘錫optimum研究分析 34 4-1-1 增加助銲劑量方法 (Extend flux depth ) 34 4-1-2 延長迴銲時間研究分析(Add reflow time) 35 4-1-3 植球前助銲劑預洗( Flux Pretreatment) 35 4-2 BGA 植球Reflow Profile optimum研究分析 37 4-2-1 拉球強度及殘錫分析(CBP & Failure mode) 37 4-2-2 推球強度及殘錫分析(CBP & Failure mode) 39 4-2-3 球偏值比較分析(Ball Shift Comparison) 40 4-3 BGA植球推球製程能力控制(Ball Shear CPK Control) 40 4-3-1推球程序分析(SOP Verify) 40 4-3-2 推球參數分析(Ball Shear Parameter verify) 41 4-4 BGA錫球&助銲劑Q time管控 43 4-4-1 植球前良率及重工率的分析 43 4-4-2 植球後推球及拉球比較的分析 43 4-4-3 基板變色及助銲劑殘留的分析 44 4-4-4 材料特性的分析(FTIR & PH & Copper Mirror) 44 4-5 BGA錫球孔洞改善(Void Improvement) 46 4-5-1 Reflow Parameter改善 47 4-5-3 Pre Solder Wetting High分析 47 4-5-4 Void & Wetting high & Volume關係 47 4-5-5 降低Solder Volume之分析 48 第五章 結論 49 5-1 植球墊污染異常及殘錫optimum研究分析 49 5-2植球Reflow Profile optimum研究分析 49 5-3植球推球製程能力控制 50 5-4材料:錫球&助銲劑Q time管控 50 5-5 Solder Void Improvement 50 |
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