本論文採用TSMC 0.18um 1P6M CMOS，設計一個低功率、低相位雜訊、快速鎖定之非整數(Fractional-N)頻率合成器以及最佳化的壓控振盪器。本頻率合成器主要應用於IEEE 802.16e 行動式Wimax裝置，提供2.3GHz至2.45GHz的本地振盪頻率，用於射頻收發機的前端電路。本論文的頻率合成器包含相頻偵測器 (PFD)、電荷幫浦(CP)、低通迴路濾波器(LPF)、壓控振盪器(VCO)、多模數除頻器 (Multi-modulus divider)以及差異積分調制器(Delta-sigma modulator)。論文中設計一個低相位雜訊、低功率消耗、穩定輸出的壓控振盪器，採用差異積分調製器，產生極高頻率解析度、快速切換頻率、低相位雜訊等特性。最後再提出一個切換機制，使頻率合成器在除整數的情況下先達到鎖定，再切換為除非整數，確保頻率合成器可以在鎖定的過程不受非整數的影響而增加鎖定時間。

This thesis presents a low power consumption, low phase noise, and fast locking CMOS fractional-N frequency synthesizer with optimalied voltage-controlled oscillator. The frequency synthesizer is designed in a TSMC 0.18μm CMOS 1P6M technology process. It can be used for IEEE 802.16e mobile Wimax’s devices and outputing frequency is ranged from 2.3GHz to 2.45GHz for the local oscillator in RF front-end circuits. The proposed frequency synthesizer consists of a phase-frequency detector (PFD), a charge pump (CP), a low-pass loop filter (LPF), a voltage-controlled oscillator (VCO), a multi-modulus divider, and a delta-sigma modulator (DSM). In system design, two voltage-controlled oscillators we presented to achieve low power consumption, low phase noise, and stable output swing. Delta-sigma modulator (DSM) is adopted to produce high frequency resolution, switching over frequency fast and very low phase noise. This thesis proposes a switch circuit which can reduce the lock of time of synthesizer. In the mean time it also reduces the emergence of lose lock.

CHAPTER 1 INTRODUCTION...................................................................................1
1.1 Motivation........................................................................................................1
1.2 Thesis Organization .........................................................................................4
CHAPTER 2 THE CONCEPTS OF FREQUENCY SYNTHESIZER .........................5
2.1 General Concepts .............................................................................................5
2.1.1 Parameters of frequency synthesizer ....................................................6
2.2 Types of Frequency Synthesizer ......................................................................7
2.2.1 The Digital Synthesizer.........................................................................7
2.2.2 The Indirect Synthesizer .......................................................................8
2.2.3 The Direct Synthesizer..........................................................................9
2.3 Fractional-N Frequency Synthesizer..............................................................11
2.3.1 Advantage of fractional-N synthesizer................................................11
2.3.2 Design of Fractional-N synthesizer ....................................................11
2.3.3 Traditional structure and principle of operating..................................12
2.4 Delta-sigma modulator (DSM) ......................................................................13
2.4.1 1st-order DSM ....................................................................................13
2.4.2 2nd-order MASH..................................................................................15
2.4.3 3rd-order MASH..................................................................................16
2.4.4 Single loop DSM.................................................................................19
2.5 Non- ideal characteristic of DSM ..................................................................20
2.5.1 Quantization noise ..............................................................................20
2.5.2 Fractional spurs...................................................................................20
2.5.3 Delta-sigma of fractional compensation .............................................22
CHAPTER 3 The Proposed Fractional-N Frequency Synthesizer ............................23
3.1 Proposed Fractional-N Frequency Synthesizer..............................................23
3.2 Phase Frequency Detector (PFD)...................................................................24
3.2.1 Basic Concepts....................................................................................24
3.2.2 The design of PFD ..............................................................................26
3.3 Charge Pump (CP) .........................................................................................29
3.3.1 Basic Concepts....................................................................................29
3.3.2 The design of CP.................................................................................31
3.4 Voltage Controlled Oscillator (VCO) ............................................................32
3.4.1 Basic Concepts....................................................................................32
3.4.2 Cross-coupled LC VCO......................................................................34
3.4.3 Noise Filter and Memory-Reduced Tail Transistor.............................35
3.4.4 The proposed LC VCO .......................................................................37
3.5 Frequency Divider .........................................................................................42
3.5.1 Basic Concepts....................................................................................42
3.5.2 The design of Frequency Divider .......................................................43
3.6 Loop filter ......................................................................................................47
3.7 Delta-Sigma Modulator (DSM) .....................................................................49
3.7.1 Design of Delta-Sigma Modulator......................................................49
3.8 Switch circuit .................................................................................................53
CHAPTER 4 SIMULATION RESULTS.....................................................................55
4.1 RF Model and CMOS Process.......................................................................55
4.2 Simulation results of PFD..............................................................................56
4.3 Simulation results of CP ................................................................................59
4.4 Simulation results of VCO.............................................................................60
4.5 Simulation results of Frequency Divider .......................................................65
4.6 Simulation results of Delta-Sigma Modulator ...............................................66
4.7 Simulation results of Fractional-N Synthesizer .............................................67
4.8 Layout of Chip ...............................................................................................69
CHAPTER 5 CONCLUSION AND FUTURE WORK ..............................................71
5.1 Conclusion .....................................................................................................71
5.2 Future Work ...................................................................................................71
Reference .....................................................................................................................72

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