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博碩士論文 etd-0729110-143746 詳細資訊
Title page for etd-0729110-143746
論文名稱
Title
ㄧ個新溝槽式氧化層TFT特性探討與在1T-DRAM上的應用
Characteristics of a New Trench Oxide Layer Polysilicon Thin-Film Transistor and its 1T-DRAM Applications
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
56
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2010-07-02
繳交日期
Date of Submission
2010-07-29
關鍵字
Keywords
多晶矽薄膜電晶體、製程簡單、溝槽式氧化層、源極/汲極縛點
Polysilicon TFT, Source/Drain tie, Simple process, Trench oxide layer
統計
Statistics
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The thesis/dissertation has been browsed 5641 times, has been downloaded 0 times.
中文摘要
在本論文中,我們提出一個製程簡單且能降低自我加熱效應(Self-Heating Effect)的溝槽式氧化層應用在多晶矽薄膜電晶體中(Trench Oxide Layer Polysilicon Thin Film Transistor, TO TFT)。根據ISE-TCAD的模擬,我們提出的架構有著幾個特點,1. 定義主動區時也能同時形成Box,使得製程變的簡單。2. TO TFT中的氧化層有著溝槽式的設計,能使電洞儲存於溝槽中不易流失,進而提升感測電流視窗(84%)與狀態保留時間(57%)。3. TO TFT在生成Box時也能同時形成源極/汲極縛點(Source/Drain Tie),而源極/汲極縛點的設計如同兩條散熱路徑,能使元件有效散熱,降低自我加熱效應的影響,提升元件的熱穩定性。這些特點使得我們的架構相較於Conventional Polysilicon Thin Film Transistor, Conv. TFT)有較佳的性能。
Abstract
In this thesis, we propose a simple trench oxide layer polysilicon thin-film Transistor (TO TFT) process and the self-heating effects can be significantly reduced because of its structural advantages. According to the ISE-TCAD simulation results, our proposed TO TFT structure has novel features as follows: 1. The buried oxide and the isolation oxide are carried out simultaneously in order to achieve a goal of simple process. 2. The trench design is used to improve both the sensing current windows (~ 84%) and the retention time (~ 57%). 3. The thermal stability is drastically improved by its naturally formed source/drain tie. The above mentioned features help our proposed device structure to demonstrate the desired characteristics that are better than that of a conventional TFT. Additionally, the thermal instability is drastically improved which is good for long-term device operation.
目次 Table of Contents
第一章 導論 12
1-1 背景與重要性 12
1-2 動機 14
1-3 1T-DRAM論文討論 15

第二章 1T-DRAM的操作原理 20

第三章 新架構製程與規劃 23
3-1 前言 23
3-2 理想製程 24
3-3 實際製程 26

第四章 模擬結果與討論 29
4-1 前言 29
4-2 模擬使用的模型說明 30
4-3 電性探討 33
4-3-1 電晶體特性 33
4-3-2 1T-DRAM方面的應用 34

第五章 結論與未來發展 50
5-1 結論 50
5-2 未來發展 50
Reference 51
附錄 56
附錄A 個人著作 56




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