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論文名稱 Title |
一種新的結構以抑制電鍍線間之串音雜訊 A Novel Structure to Suppress the Crosstalk Noise on Coupled Plating Bars |
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系所名稱 Department |
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畢業學年期 Year, semester |
語文別 Language |
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學位類別 Degree |
頁數 Number of pages |
58 |
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研究生 Author |
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指導教授 Advisor |
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召集委員 Convenor |
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口試委員 Advisory Committee |
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口試日期 Date of Exam |
2012-07-18 |
繳交日期 Date of Submission |
2012-07-30 |
關鍵字 Keywords |
眼圖、串音效應、電鍍線 Plating bars, Crosstalk, Eye diagram |
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統計 Statistics |
本論文已被瀏覽 5710 次,被下載 3555 次 The thesis/dissertation has been browsed 5710 times, has been downloaded 3555 times. |
中文摘要 |
電鍍線(Plating bars)是在傳統BGA封裝過程中不可避免的殘留元件,並且會對訊號產生許多影響,例:阻抗不連續、EM效應、較差的傳輸品質..等。而在本論文中探討的則問題則是電鍍線的耦合效應對於訊號線本身的影響,從不同負載的耦合結構分析下手,並提出一個L-stub耦合的架構來減少其耦合量,探討其長度比例、位置擺放及個數,找到可以抵銷雜訊的範圍,利用訊號之間的反射、分流概念來達到減少的效果,且不需要額外加入其他的元件即可達到效果,並與目前減少耦合量的方法做比較,然後試著實作來證明此方法的可行性,最後利用眼圖分析的結果來證實對於訊號的傳遞品質有所改善。 |
Abstract |
In the BGA family package, plating bars must be added in the manufactured processing , However they will cause discontinuities[1]、radiation effect[2] and bad transmission efficiency[3]~[6].This paper considers the signal transmission problem caused by the couple plating lines. This thesis starts from analyzing the different terminations of the couple lines, then proposes a novel L-stub element structure which can decrease the crosstalk noise efficiently on the plating lines. Discussion of the L-stub length ratio, L-stub position and the numbers of the L-stub then provides the useful range. The basic idea is to use the reflection of source to cancel the original couple and doesn’t have to add additional element. In addition, it compares well with other methods which are also designed for reducing crosstalk and circuits are implemented to prove our design. Last of all, using the eye diagram to manifest the signal quality improvement. |
目次 Table of Contents |
目錄 審定書…………....……….……………………………….…i 誌謝…………….…....……………………………………….ii 目錄….………………………………………………………iii 圖表索引………..……..……………………………………..v 中文摘要………..………………………………..………...viii Abstract...…….…………………………………….……….ix 第一章 序論…………………………………...........……….1 1.1 研究動機與目的.…………………………………….….1 1.2 何謂電鍍線………………….………………….……….2 1.2 論文大綱..……………………………………………….4 第二章 串音效應……………………………….......….……5 2.1 串音效應的成因.....………………………………….….5 2.1.1 傳輸線串音效應之時域分析…………..........….…....5 2.1.2 開路分析…..………………………………………….9 2.2 Plating Bar耦合架構…………........…………………11 2.2.1 公式推導…...............………………………………..11 2.3 常見的解決方法………………………………………14 2.3.1 蛇行線(Serpentine Line)…….……………………14 2.3.2 Guard trace…………………………………………16 第三章 L-stub結構….……..……………………………...19 3.1 L-stub結構……….…………………………………...19 3.1.1 原理簡介 ………….………………………………..19 3.2 L-stub結構……………….…………………………...20 3.2.1 位置探討 ………………………………..…………..20 3.2.2 長度探討 ………......………………………………..22 3.2.3 個數探討 …………………………………......……..26 3.3 不同結構比較………………………………………....28 第四章 量測與模擬驗證...………………………….……..31 4.1 實作模型.……….........…………………………….….31 4.2 模擬環境修正….…..………………………………….33 4.3 眼圖分析…...………..…………………………..…….38 4.3.1 眼圖介紹 ……………………......…………………..38 4.3.2 IBIS model加上plating bar架構之眼圖模擬……..40 第五章 結論…….........…………………………………….43 參考文獻…………….....…………………………………..44 |
參考文獻 References |
參考文獻 [1] Young-Woo Kim “Analysis of High-Speed Package Substrate without. Plating Bars,” Electronic Components and Technology Conference, 2008 [2] H. Yue and M. Lamson, "Effect of plating stubs of BGA packages on spurious EM radiation," in Proc. Electron. Compon. Technol. Conf., 2000, pp. 786-792 [3] T. Hamano, Y. Ikemoto, “Electrical characterization of a 500 MHz frequency EBGA package,”IEEE Trans. Advanced Packaging, vol. 24, pp.534-541,Nov.2001 [4] Since, H.J.H. Lee Chan Kim, Kuan Chin Lee “Signal Integrity Analysis and Validation of GHz I/O Interface on Wire Bond Ball Grid Array Technology Package” Electronic Materials and Packaging, 2006. [5] Carl Ryu, Myoung-Bo Kwak, Hee-seok Lee, Sang-il Yim”Electrical characterization of LDP-PBGA package substrate” Electronics Packaging Technology Conference, 2006. EPTC '06. 8th [6] W. Beyene, “Controlled inter-symbol interference design techniques of conventional interconnect systems for data rates beyond 20 Gbps,”Electr. Perform. Electron. Packag., pp. 159–162, Oct. 2006 [7] Chin Hui Chong; Sook Har Leong; Aichie Wang; Fang, H.R.; , "BGA package design for reduced gold bond wire length and package parasitics with etch-back process," (EPTC), 2010 12th , vol., no., pp.807-810, 8-10 Dec. 20 [8]K.C.Gupta” Microstrip Lines and Slotlines 2nd Ed.” [9] S. H. Hall, G. W. Hall and J. A. McCall, High-Speed Digital. System Design a Handbook of Interconnect Theory and Design. Practices [10] S. K. Lee, K. Lee, H. J. Park and J. Y. Sim, “FEXT-eliminated stub-alternated microstrip line for multi-gigabit/second parallel link,” Electron. Lett., vol. 44, no. 4, pp. 272-273, Feb. 2008. [11] S.-K. Koo and H.-S. Lee” Crosstalk Reduction Effect of Asymmetric Stub Loaded Lines” J. of Electromagn. Waves and Appl., Vol. 25, 1156–1167, 2011 [12] M. Almalkawi, Z. Khan, V. Devabhaktuni, and C. Bunting, “Far-end crosstalk reduction in adjacent PCB traces employing High/Low-Z configurations,” IEEE International Symposium on Electromagnetic Compatibility, Fort Lauderdale, July, 2010, [13] B. Eged, I. Novak, P. Bajor, "Crosstalk Reduction on Stripline Printed Circuit Boards with Additional Centre Traces," Proceedings of the 1994 EM CSymposium, May 16-20, 1994, Sendai, Japan, pp. 316-319 [14] Mohammad Almalkawi, Vijay Devabhaktuni”Far-End Crosstalk Reduction in PCB Interconnects Using Stepped Impedance Elements and Open-Circuited Stubs” International Journal of RF and Microwave Computer-Aided Engineering [15] G. H. Shiue, C. Y. Chao, W. D. Guo and R. B. Wu, "Improvements of time-domain transmission waveform in serpentine delay line with guard traces," IEEE International Symposium on Electromagnetic Compatibility, Jul. 2007, pp.1-5. [16]K. Lee, H. B. Lee, H. K. Jung, J. Y. Sim and H. J. Park, "A serpentine guard trace to reduce the far-end crosstalk voltage and the crosstalk induced timing jitter of parallel microstrip," IEEE Trans. on Advanced Packaging, Nov. 2008, vol. 31, issue 4, pp.809-817 [17] Chiu, P. W. and G. H. Shiue, "The impact of guard trace with open stub on time-domain waveform in high-speed digital circuits,"2009 IEEE-EPEPS, 219-222, Portland, OR, Oct. 19-21, 2009. [18] B.Edged, F.Mernyei, I.Novak and P.Bajor, "Reduction of far-end crosstalk on Coupled microstrip PCB interconnects,"IEEE Instrumentation and Measurement Technology Conference, vol. 1, pp 287-290, 1994 [19] Xiao, F. and Y. Kami, "Modeling and analysis of crosstalk between differential lines in high-speed interconnects," PIERS Online, Vol. 3, No. 8, 1293-1297, 2007. [20]N.K.,S.M.Voda and D.M. Pozar” Two Methods for the Measurement of Substrate Dielectric Constant”Microwave Theory and Techniques, IEEE Transactions on, Volume:35,Issue:7,Pages:636-642,Jul 1987 [21] Shu-Qiang Zhang ; Hung-Hsiang Cheng ; Yin-Guang Zheng ; Chang-Lin Yeh “High Speed Package Design and Electrical Performance Analysis” Electronic Packaging Technology & High Density Packaging, ICEPT-HDP 2008. International Conference pp1-4 2008 [22] C.P. Hung, Mark Li, Samuel Wu and CT Chiu “20GHz Electrical Characterization and Limit of Organic BGA. Packages With and Without Plating Stub” 6th VLSI-PKG-WS, 2002. [23]Eric Bogatin “Signal integrity-Simplified” [24]Howard Johnson, Martin Graham “ High-speed signal Propagation: Advanced Black Magic.” [25] Huan-Huan Li,Chen-Jiang GUO, Yu Zhang” Research of Crosstalk Reduction between Microstrip Lines Based on High-Speed PCBs” Antennas Propagation and EM Theory (ISAPE), 2010 9th International Symposium pp994 |
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