首先本論文提出一個有效的預測方法加速光線追蹤的成像速度，基於相鄰光線間的一致性，相鄰光線有很高的機率相交到相同的節點或是相交到一樣的三角形，於是我們利用先前光線走訪的情況預測後續光線的相交節點，實驗結果顯示此預測方法平均節省34%測試節點的次數，軟體模擬時間平均節省18%。
我們還進而預測相鄰光線會相交相同的三角形，藉此取得三角形到光線原點的距離排除較遠的節點，實驗結果顯示此方法不僅能節省測試節點的次數還能節省測試三角形的次數。
本論文第二部分提出一個創新的BVH樹資料結構使得光線追蹤系統存取外部記憶體節省40%的資料傳輸量，46%資料存取次數同時節省10%的外部記憶體資料儲存量。我們的預測方法需在每個節點配置一個預測旗標，若將全數的預測旗標存到內部記憶體將導致浪費硬體，於是我們以極小的ping-pong buffer取代依節點數量配置旗標的方法，數據顯示ping-pong buffer的記憶體大小只需依節點數量配置的1%。

This thesis presents an efficient prediction-based ray-tracing scheme in order to accelerate rendering of high-fidelity three-dimensional (3D) graphics scenes. Since the neighboring rays normally exhibit high coherence, they will have similar traversal footprint of the tree structure of the graphics scenes, or even intersect the same triangle. Therefore, this thesis first proposes a novel prediction traversal method in order to skip some ray-node intersection tests during the tree-traversal of the current ray based on the traversal result of its previously traced neighboring ray. Our experimental results based on several benchmarks show that the average saving of the ray-node test number is about 34%, which can lead to 18% saving of the overall rendering time based on the pure software implementation. Next, this paper furthers proposes a new compact tree coding structure which can lead to over 10% tree storage reduction. More importantly, this new tree architecture can be applied for our proposed prediction traversal method to achieve more than 40% off-chip memory data amount transmission and 46% bus transaction during the tree traversal. In order to realize the proposed prediction method, normally an on-chip buffer is required to store the prediction flags of each node. In order to save the on-chip buffer capacity, this paper also proposes a ping-pong prediction buffer design whose on-chip buffer size is only l% of the table-based approach. Finally, this paper also uses the nearest triangle hit by the previous ray as the predicted triangle that will be intersected by the current ray. Our simulation results show that not only the ray-node intersection tests can be further reduced, the triangle intersection tests can also be saved.

論文審定書 i
摘要 ii
Abstract iii
圖次 vi
表次 viii
Chapter 1 概論 1
1.1 研究動機 1
1.2 研究大綱 1
Chapter 2 研究背景與相關研究 2
2.1 光線追蹤技術 2
2.2 BVH樹 3
2.3 使用BVH加速光線追蹤 5
2.4 走訪順序 6
2.5 群組光線 7
2.6 Ray specialized contraction on BVH 8
Chapter 3 基於相鄰光線一致性加速光線追蹤 11
3.1 相鄰光線走訪路徑一致性介紹 11
3.2 基於相鄰光線一致性標記預測旗標 14
3.3 變更走訪BVH樹順序 17
3.4 預測相交三角形 18
Chapter 4 高效率存取外部記憶體的機制 20
4.1 創新的BVH資料結構 20
4.2 使用Ping-pong buffer實現預測方法 25
Chapter 5 實驗數據 29
Chapter 6 結論與未來規劃 42
6.1 結論 42
6.2 未來展望 42
參考文獻 43

[1] B. De Greve, “Reflections and refractions in ray tracing,” Nov. 2006.
[2] T. Whitted, “An improved illumination model for shaded display,” Communications of the ACM, vol. 23, pp. 343–349, Jun 1980.
[3] Y. Gu, Y. He, and G. E. Blelloch, “Ray specialized contraction on bounding volume hierarchies,” Computer Graphics Forum, vol. 34, pp. 309–318, Oct 2015.
[4] “Bounding volume hierarchies
”http://en.wikipedia.org/wiki/Bounding_volume_hierarchy
[5] “K-d Tree”
http://en.wikipedia.org/wiki/K-d_tree
[6] A. L. dos Santos, V. Teichrieb, and J. Lindoso, “Review and comparative study of ray traversal algorithms on a modern GPU architecture,” in WSCG 2014 Conference on Computer Graphics, Visualization and Computer Vision, Plzen, Jun 2014, pp. 203–212.
[7] M. Pharr and G. Humphreys, Physically Based Rendering: From Theory to Implementation. San Francisco, LA: Morgan Kaufmann, 2004.
[8] A. Williams, S. Barrus, R.K. Morley, P. Shirley, “An efficient and robust ray–box intersection algorithm,” Journal of Graphics Tools, pp.49-54, Jan 2005.
[9] T. Möller, B.Trumbore, “Fast, minimum storage ray-triangle intersection,” Journal of Graphics Tools, pp.21-28, Oct 1997.
[10] J.-H. Nah and D. Manocha, “SATO: Surface-area traversal order for shadow ray tracing,” Computer Graphics Forum, vol. 33, pp. 167–177, Sep 2014.
[11] A. T. Afra, L. Szirmay-Kalos, “Stackless multi-bvh traversal for cpu mic and gpu ray tracing,” Computer Graphics Forum, vol. 33, pp. 129-140, Nov 2014..
[12] 吳俊霖, “階層式走訪之光線追蹤電路設計,”國立中山大學碩士論文, September.2015
[13] C. Benthin, I. Wald, S. Woop, M. Ernst and W. R. Mark, “Combining Single and Packet-Ray Tracing for Arbitrary Ray Distributions on the Intel MIC Architecture,” IEEE Transactions on Visualization and Computer Graphics, vol. 18, no. 9, pp. 1438-1448, Sept 2012.
[14] U. Assarsson and T. Moller, “Optimized view frustum culling algorithms for bounding boxes,” Journal of Graphics Tools, pp. 9–22, Sep 2000.