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博碩士論文 etd-0804100-225944 詳細資訊
Title page for etd-0804100-225944
論文名稱
Title
一種分散式共享記憶體多重處理器之並行性控制機制的系統評估
System Evaluation of A Concurrency Control Mechanism for Distributed Shared Memory Multiprocessors
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
80
研究生
Author
指導教授
Advisor
召集委員
Convenor

口試委員
Advisory Committee
口試日期
Date of Exam
1999-07-15
繳交日期
Date of Submission
2000-08-04
關鍵字
Keywords
分散式共享記憶體、鎖定
DSM, lock
統計
Statistics
本論文已被瀏覽 5667 次,被下載 1523
The thesis/dissertation has been browsed 5667 times, has been downloaded 1523 times.
中文摘要
在分散式多重處理器上,共享記憶體程式使用內部處理器之間的同步機制來保證並行存取共享資料的正確性,使用最頻繁的同步機制是鎖定。傳統上,互斥鎖定由於簡易的關係成為最常使用的方法。在這一篇論文當中,我們對我們所研究的一種使用訊息傳遞與硬體鎖定管理者的同步機制做系統效能評估。此同步機制可判斷使用相同組資料的各臨界區間在所可能使用的資料上是否不具互斥關係,而可並行執行;而較早釋出的共用資料亦可立即被其他臨界區間使用,而增加互斥之臨界區間部分並行執行性。
我們設計的模擬機制包含硬體鎖定需求者模組與硬體鎖定管理者模組與其餘分散式多重處理器系統模擬模組。鎖定需求者模組內嵌於所有處理器節點,必須要有編譯程式的配合,在程式中預先分析臨界區間所可能使用的共用資料與讀寫方式,以提供鎖定需求者傳送對應之鎖定需求訊息至管理各共用資料的鎖定管理者做鎖定要求之嘗試。鎖定管理者模組是內嵌於部分處理器節點,可以儘快判斷各共用資料之鎖定需求是否可以授權,再以訊息通知原鎖定需求者,使臨界區間獲知可使用該資料,而達成各臨界區間的並行性。
相對來說,一般使用之單一互斥鎖定機制不具並行性,本研究之軟硬體配合的鎖定非互斥性判斷機制可增加臨界區間執行的並行性,而改進分散式並行程式的執行時間。
在此論文研究中,我們設計了這兩種臨界區間同步機制的網狀網路分散式多重處理環境的模擬器,並規劃了多種臨界區間特性的並行程式負載,以之測試比較我們的並行控制方法在不同狀況下所能產生的執行效能改進。
Abstract
In distributed-memory multiprocessors, shared-memory programs utilize synchronization mechanisms to guarantee the correctness of accessing shared data. Traditionally, the mutually exclusive lock mechanism is the most commonly used method due to its simplicity. In this thesis research, we performed system performance evaluation of our hardware-supported lock management synchronization mechanism. This mechanism can detect the concurrency among critical sections using the same set of shared data. The concurrency detection is based upon the non-intersection of usage data sets and upon the non-conflicting accesses of the shared data. When a critical section releases an accessed data before leaving the critical section, other critical section can immediately be granted to access the data. Thus, two forms of concurrency among critical sections can be utilized.
We designed a system simulator which consists of two main simulation modules and some other distributed multiprocessor system simulation modules. The first one is the simulation module of hardware lock requester residing in each processor node. The second one is the simulation module of hardware lock manager residing in selected processor nodes. On the software support, a compiler can analyze each critical section in the program on the set of possible utilized shared data and their read/write access types of the critical section. Then, it attaches this information in the machine program. Upon entering a critical section, the hardware lock requestor sends individual lock messages of the accessed shared data to corresponding hardware lock managers in other nodes. Each lock manager determine if some lock requests are conflict free and then rapidly grants the access rights by sending messages to the original lock requesters. The lock requester finally notifies the program with the critical section the permission to use the shared data. In this way, the concurrency among critical sections accessing the same set of shared data can be achieved as much as possible.
In contrast, the mutually exclusive locking mechanism does not exhibit concurrency among critical sections accessing the same set of shared data. The hardware-software concurrency control mechanism studied in our research can detect non-conflicting situations among critical sections. Thus, it can enhance the actual program execution concurrency and improve the execution time of concurrent programs.
In this thesis research, we designed the simulation environment of mesh-connected distributed multiprocessors with these two critical section synchronization mechanisms. We also planed multiple sets of concurrent program workload of various characteristics. We performed the performance experiments to compare these two critical section synchronization methods. It demonstrates that under different situations, our method can improve the execution performance of concurrent programs by various extent.
目次 Table of Contents
目錄

第一章 導論 1
1.1 分散式共享記憶體簡介 1
1.2 研究動機和目的 3
1.3 論文結構 6
第二章 臨界區間並行性控制系統設計 7
2.1 臨界區間之分割鎖定 7
2.2 鎖定並行性偵測判斷部分 10
2.3 鎖定管理者(lock manager) 12
2.4 決定鎖定管理者的位置 14
2.5 共享變數數值之傳遞與使用 16
2.5.1 純量共享變數數值之傳遞 16
2.5.2 陣列共享變數數值之使用 19
2.5.3 共享變數數值傳遞與使用的指令支援 19
2.6 鎖定管理者對臨界區間之鎖定需求的處理 22
2.6.1 進入臨界區間的工作流程 22
2.6.2 鎖定管理者對避免死結與違反臨界區間執行互斥關係之鎖定處理 23
2.7 陣列使用範圍交集判斷 28
2.7.1 陣列範圍處理 28
2.7.2 範圍區間交集判斷 31
第三章 系統模擬設計與模組功能流程 33
3.1 系統概觀 33
3.2 Processor/Lock Requester模組 35
3.3 Lock Manager模組 38
3.3.1 管理 38
3.3.2 排程 39
3.3.3 檢查引擎(Checking Engine) 42
3.3.4 輸入功能方面 48
第四章 實驗規劃和比較 50
4.1實驗方法 50
4.1.1 臨界區間並行性之實驗設計 50
4.1.2 具互斥執行的臨界區間之實驗設計 52
4.1.3 測量尺度 52
4.2 工作負載量規劃 54
4.3 實驗規劃 55
4.3.1 非臨界區間的處理時間與臨界區間的處理時間之比例:R 55
4.3.2 並行性的比例 :RR/RW 55
4.3.3 每個臨界區間的鎖定數目 :Nl 55
4.3.4 臨界區間的處理時間 :Tcs 55
4.3.5 一維陣列 :1D 55
4.3.6 二維陣列 :2D 56
4.3.7 三維陣列 :3D 56
4.4 實驗結果與分析 57
4.4.1 非臨界區間的處理時間與臨界區間的處理時間之比例:R 57
4.4.2 並行性的比例 :RR/RW 58
4.4.3 每個臨界區間的鎖定數目 :Nl 58
4.4.4 一維陣列 :1D 60
4.4.5 二維陣列 :2D 61
4.4.6 三維陣列 :3D 64
4.4.7 檢查引擎的使用量 :utility 66
第五章 結論 68
參考文獻 69


參考文獻 References
參考文獻:

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[18] C. K. Tang, “Cache System Design in the Tightly Coupled Multiprocessor System,” Proc. NCC, pp. 749-753, 1976.

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