在微處理器的演進上，應用x86複雜指令集之高效能處理器已被廣泛的使用，且架構上逐漸從原先單核心邁向多核心；但其指令為變動長度的特性依舊造成指令抓取上的困難，影響著整體的執行效能。雖然目前已有支援split-line和快速抓取變動長度指令的機制，但需要增加額外硬體完成，有時間上與硬體上的高複雜度問題。因此本論文對X86指令集提出相容之固定長度指令編碼格式，解決變動長度指令抓取的困難問題。經由指令長度分布分析，考慮對記憶體空間布局，決定以4 bytes與8 bytes作為規劃長度。並以下列六個轉譯規則，完成對固定長度指令編碼格式的設計規劃;(一)利用輔助暫存器作轉譯搬移,減少原暫存器間的資料相依性；(二)原暫存器可以較少指令數完成轉譯時,以原暫存器完成；(三)以8 bytes完成編碼complex case中指令;(四)displacement 與 immediate 搬移入輔助暫存器中,自動作符號位元擴展；(五)搭配指令辨別prefix的輔助暫存器編碼位址，只在r/m field或index field;(六)displacement field與immediate field較長者先搬移，直到符合規劃長度內。且在記憶空間的節省與指令抓取之硬體設計複雜度的考量下，進行指令封包的類型分析，以便對程式空間作壓縮，減少程式因指令長度固定化的空間損失。最後經以CINT2006為Benchmarks的驗證分析，成功執行固定長度指令轉譯功能實現；並在指令封包機制下，成功達到在程式空間上壓縮目的。

In the microprocessor development, the high performance microprocessor applies the x86 complex instruction set is used widely.
And the signal-core architecture towards slowly to multi-core one .But the variable-length instruction still creates the difficulties in instruction fetching and affects the whole executive- performance. There has the mechanism which supported the split-line and fetched fleetly the variable-lengths instruction. It has the problem in high time and hardware complexity, because it was accomplished with additional hardware. Accordingly, this paper proposed a fixed-length instruction set with design in compatible and extended x86 instruction set used the fixed-length instruction form to solve the difficulties in fetching the variable-length instructions. We considered the factor an overall arrangement of memory space and decided the length 4 bytes and 8 bytes to formulate the fixed-length instruction set. And we used the following six transitionary rules to complete the formulation for the coded form of the fixed-length instructions.(1)We used the auxiliary registers to save the value to decrease the data dependence between the original registers.(2)If it could use a few instructions to complete the translation with the original registers, we used the original registers to do it.(3)The complex case instructions were coded with eight bytes.(4)It did sign-extension by itself when displacement and immediate were moved to the auxiliary registers.(5)The auxiliary registers with the diacritic prefix were only coded in the r/m field or the index field.(6)One of displacement field and immediate field was moved first when its length was longer.
And we considered the hardware complexity of saving memory space and fetching instructions, we analyzed the categories of instruction packages to compress the program space to decrease the space loss which the fixed-lengths of instructions created. In the case of verifiable and experimental framework, the CINT2006 was used to be benchmarks. And the function which translated the fixed-length instructions was succeeded to execute. It was successful to achieve the purpose the program space was compressed efficiently in the instruction package mechanism.

摘要 i
ABSTRACT iii
目 錄 v
圖片列表 viii
表格列表 xi
第一章 簡介 1
1-1 研究動機 2
1-2 研究目的 3
1-3 論文架構 4
第二章 相關研究 5
2.1 IA-32 x86一般指令集介紹 5
2.1.1 操作模式與指令格式 5
2.1.2 定址模式 7
2.1.3 程式規劃模型 8
2.2 Superscalar架構下變動長度指令抓取機制 11
2.2.1 變動長度指令之超純量架 11
2.2.2 X86指令集之超純量架構 17
2.2.3 指令抓取機制 19
2.2.4 Instruction Pointer Table 指令抓取機制 21
2.3 固定長度指令集設計概念 24
第三章 固定長度指令集設計 27
3.1 指令集設計理念與機制 27
3.1.1 增設輔助暫存器組 28
3.1.2 增加指令辨認的prefix 29
3.1.3 增加延伸的指令 30
3.2 指令集設計規則 31
3.3 固定長度指令集 35
3.3.1 固定長度制定策略 35
3.3.2 complex case 的固定長度指令 36
3.3.3 固定長度指令集格式 37
3.3.4 定址模式 39
3.3.5 固定長度指令集 40
3.4 硬體觀點 42
3.4.1 擴充偵測機制 42
3.4.2 簡化指令抓取之硬體電路複雜度 43
第四章 指令封包機制設計 45
4.1 指令封包類型決定的策略 45
4-2 固定長度4-byte 指令封包 48
4-3 固定長度8-byte指令封包 49
4-4 固定長度指令集轉譯程式 51
4.4.1 指令分析模組 51
4.4.2 轉譯指令模組 53
4.4.2.1 opcodetrans模組 53
4.4.2.2 disptrans模組 54
4.4.2.3 immtrans模組 56
4.4.2.4 sibtrans模組 58
4.4.2.5 instrtrans模組 58
4.5 具指令封包機制的固定長度指令集轉譯程式 60
4.5.1 具4-byte指令封包機制之轉譯程式 60
4.5.2 具8-byte指令封包機制之轉譯程式 62
4.6 跳躍指令處理 64
第五章 驗証與分析 65
5-1 分析環境設定 65
5-1-1 驗證分析的方法 65
5-1-2 評估程式 66
5.2 指令封包數量分析 68
5.3 固定長度指令集與指令封包機制分析 70
第六章 結論 72
參考文獻 73
附 錄: 75

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