今日的嵌入式系統包含各式各樣常用的軟硬體，由於系統單晶片工業開發目標已從加速處理器轉換為分配工作，因此複雜的系統單晶片設計是否帶來相對效益是一個重要的議題。為了探討硬體資源完成系統工作的程度，軟體和硬體必須同時被視為效能資訊的參考依據。我們的團隊採用GIF (Generic Interface) Socket-based介面以加速整合系統單晶片至AMBA AXI interconnect，因此也需要關注系統上可能影響效能的傳輸行為。所以，本論文提出Socket-Based 效能監測工具套件 (SB PMTS) 來監測兩種效能資訊：(1) 以下待測對象執行時間：使用者空間之應用程式、核心空間之驅動程式和執行使用者程序之硬體。(2) 各元件與系統單晶片之連接架構間的傳輸事件。SB PMTS 包含兩個主要的硬體監測模組：Program monitor (PM) 和Transaction monitor (TM)。TM將用Socket-Based Transaction State Monitor (SB TSM)監測GIF介面之Handshake 機制。SB PMTS會同步不同來源的效能資訊，使得一般工程師不須任何Instrumentation，便能更快評估系統單晶片效能。

Embedded systems are contained in many kinds of hardware resources and software processes today. Since the SoC industry has shift its development goal from processor clock frequencies increasing to work distribution among multiple IPs, SoC interconnect is also an important factor which will influence system performance. With the demand for reviewing the accomplishment of system tasks by the hardware resource, the performance information considered from both hardware and software will need to be referred. In order to achieve efficiency of SoC integration, our team adopt GIF (Generic Interface) socket interface to integrate the custom IPs with AMBA AXI interconnect, the performance interference of transaction behaviors should also be concerned. Therefore, this thesis proposed a Socket-Based Performance Monitoring Tool Suite (SB PMTS) which is capable to monitor the two types of performance information: (1) The execution time of a complete task including user application in User Space, software in Kernel Space – such as: device driver, and major hardware IPs which may perform acceleration (2) The transaction events on the socket interface which is between custom IP and on-chip interconnect. SB PMTS consists of two main hardware monitoring components: Program monitor (PM) and Transaction monitor (TM). TM will examine the handshake mechanism of GIF socket-based interface with Socket-Based Transaction State Monitor (SB TSM). Accordingly, SB PMTS will synchronize the performance information from different resource and enable the average designers to quickly assess the quality of the SoC without any instrumentation.

Chapter 1. Introduction+1
1.1 Motivation+1
1.2 Background+2
1.3 Research Objectives+4
Chapter 2. Related Works+8
2.1 Program-level performance metrics+8
2.1.1 Static Instrumentation+9
2.1.1.1 Tracing toolkit of Linux kernel and applications+9
2.1.1.2 Software Profiling Toolkit for Sequential and Parallel Programs+15
2.1.2 Dynamic Instrumentation+20
2.1.2.1 Kprobe-based System Performance Profiling Software Tool by Writing Scripts+20
2.1.2.2 Activate probes dynamically by storing trace event objects+24
2.2 Hardware-level performance metrics+28
2.2.1 Periodic interval trigger+28
2.2.1.1 System-wide profiler by taking time-based and event-based samples+29
2.2.2 Event trigger+31
2.2.2.1 Linux performance counter interface+31
2.2.2.2 SoC On-Chip bus activities – PAU+34
2.3 System-on-a-chip (SoC) communicating system+42
2.3.1 On-Chip Interconnects Overview+43
2.3.2 AMBA 3.0 AXI Protocol+45
2.3.3 Generic Interface (GIF) Introduction+48
Chapter 3. Socket-based Performance Monitoring and Analysis+54
3.1 System Architecture+55
3.2 Program monitor architecture+57
3.3 Transaction monitor+58
3.3.1 Socket-based Transaction State Monitor+60
3.3.2 Transaction Events+64
3.3.3 Transaction Monitor architecture+65
3.3.4 Flexible TM configurations+69
Chapter 4. SB PMTS Utility tools+71
Chapter 5. Experiments+75
Chapter 6. Conclusion+76
Chapter 7. Future works+78
References+79

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