本論文以發展高效率矽基薄膜太陽電池為目標，先以軟體模擬設計高發電效率的元件結構，以提供往後元件製作之依據。
模擬時有一些假設:首先為(1)電極的歐姆接觸良好能有效導出光電流，(2)入射光能完全進入元件而無反射的現象，(3)載子在表面及接面無複合的現象。結果顯示:在150μm之P型單晶矽基板上利用熱擴散法形成P/N接面其能量轉換效率為19.7%，若在此太陽電池元件後方再鍍上P-CuInSe2(CIS)薄膜成為n-Si/p-Si/p-CIS之元件結構，以CIS高光吸收係數的特性彌補結晶矽之不足則其發電效率可由19.7%提升至21.1%。若改善形成P/N接面之擴散製程略微降低表面摻雜濃度至1*1018 cm-3則其轉換效率可達23.3%，同樣再加上CIS薄膜則轉換效率可達24.9%，此時若改變CIS組成比可將效率提升至26%，若在更進一步改良CIS成膜品質使其載子壽命由0.024μs提升至0.18μs則效率可達30.3%。
若改用p-CuGaSe2(CGS)薄膜與150μm 之N型單晶矽基板搭配，由模擬結果可得到與在N型基板進行擴散製程相近的效率，同樣的如果在此結構後方在加上n-CIS薄膜形成p-CGS/n-Si/n-CIS的結構，則其效率可由22.2%提升至26.5%，因此，嘗試成長出高品質CIS、CGS薄膜為首要目標。
接著分別模擬將上述2種元件所使用之矽基板減薄至20μm，經模擬得到效率可分別提升至32.3%及29.5%，因CIS、CGS相較單晶矽更能有效吸光，因此，將矽基板減薄是未來實驗規劃上的一個方向。
然而，異質接面太陽電池會由於晶格的不匹配，將在接面處形成差排，導致載子在接面處的複合，在107cm/s的複合速率下，效率將分別由32.3%及29.5%分別降至11.5%及8.0%。

To improve the efficiency of silicon solar cell. We simulate some designed devices by PC1D before fabricating really ones. We propose that ohmic contact between absorbing layer and electrode is well perform. The simulation result shows that: The efficiency will increase from 19.7% to 21.2% when CIS thin film sputter on a P/N junction format by thermal diffusion at P side that the structure of first device n-Si/p-Si/p-CIS due to high absorption coefficient of CIS. The substrate is P type 150μm silicon wafer. If we could lower surface doping concentration to 1*1018 cm-3 during diffusion process, the efficiency would be 23.3%. And collocation CIS could rise efficiency to 24.9%. While we change the composition ratio of CIS thin film, the efficiency will increase to 26.5%. Further, improve CIS quality to increase carrier lifetime up to 0.18μs will rise the efficiency to 30.3%.
Second type device uses P type CGS thin film combine with N type silicon wafer to format a P/N junction, the efficiency is 22.2%, and here we add a N type CIS thin film at N silicon side to fabricate p-CGS/n-Si/n-CIS device, the efficiency is 26.5%, so the priority target is how to form high quality CGS,CIS thin film.
Reduce both silicon wafer thickness to 20μm the efficiency would be 32.3% and 29.5%, due to CGS,CIS thin film high ability of light absorption, so we infer that use thin silicon compare with CIS, CGS thin film would be well performance.
However, there are dislocation formation at interface due to heterojunction lattice mismatch. It causes carrier recombination here. The efficiency of n-Si/p-Si/p-CIS will drop from 32.3% to 11.5% and p-CGS/n-Si/n-CIS from 29.5% to 8.0%.

第一章 導論 1
1.1前言 1
1.2太陽電池發展史 1
第二章 文獻回顧 3
2.1太陽電池分類 3
2.2太陽電池原理 14
2.3 實驗動機與目的 19
第三章 模擬軟體介紹及模擬結果 20
3.1 PC1D軟體參數設定 20
3.2 模擬結果 25
3.2.1 P型單晶矽太陽電池 25
3.2.2 HIT電池 27
3.2.3 n-Si/p-Si/p-CIS元件設計之模擬 28
3.2.4 CIS薄膜改善對元件效率影響 29
3.2.5基板減薄的影響 31
3.2.6 N型單晶矽太陽電池 32
3.2.7 p-CGS/n-Si 元件設計之模擬 33
3.2.8 p-CGS/n-Si/n-CIS元件設計之模擬 34
3.2.9 CGS薄膜改善對元件效率影響 35
3.2.10基板減薄的影響 36
3.2.11載子複合的影響 37
第四章 元件製作 39
4.1基板清洗 39
4.2擴散製程 40
4.3 CIS鍍製 41
4.4電極製作 41
第五章 結果與討論 43
參考文獻 44

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