隨著數位化產品的迅速發展，對於處於類比世界的我們，對類比與數位訊號的轉換和處理也日益備受重視，然而面對速度越來越快的數位產品，也延伸出對高速的類比數位轉換器的需求，又如果加上可攜性產品的應用，也顯現出類比數位轉換器功率消耗大小的重要性，故學生以高速且低電壓、低功率的概念去設計實作類比數位轉換器。
本論文採用TSMC.18um製程技術，分析管線式類比數位轉換器的架構，設計實做一個12位元，100萬取樣速率且低功率的類比數位轉換器。利用每階段1.5位元的架構，並使用動態比較器及數位錯誤更正電路來取得最後的數位輸出。

The digital product increases widely and vastly. Because we live in the analog world, we require a converter to change analog signal to digital one. However, the requirement of analog-to-digital converter is rising due to progress of DSP (Digital Signal Processor). For portable products, the power consumption also needs to take into account. As mentioned above, I will implement a high speed and low power analog to digital converter.
In this thesis, the circuits are designing with TSMC.18 1P6M CMOS process and 1.8V of supply voltage. The speed and resolution of ADC are 100Ms/s and 12bits individually. The pipelined coupling with 1.5bit/stage constitutes the main architecture of analog-to-digital converter. The dynamic comparator is used for lower power. Finally, the output codes are translated by digital correction circuit.

Chapter 1 Introduction 1
Reading Guidelines 2
Chapter 2 Analog-to-Digital Converter (ADC) 4
2.1 Introduction 4
2.2 Introduction of ADCs 4
2.2.1 Flash ADCs 5
2.2.3 Pipeline ADC 7
2.2.4 Successive Approximation ADC 8
Chapter 3 Specification of ADC 10
Chapter 4 Key design of pipeline ADC 14
4.1. Introduction 14
4.2. KT/C Noise 14
4.3. Switch 16
4.3.1. ON-Resistance 16
4.3.2. Charge Injection 17
4.3.3. Clock Feedthrough 18
4.4. Operational Amplifier 19
4.4.1. DC Gain 19
4.4.2. Bandwidth Requirement 20
4.4.3. A Example: Folded Cascode Amplifier 22
4.5. Comparator 24
4.6. Digital Correction Technique 27
4.6.1. 1.5 bit/stage 27
4.6.2. 2.8 bit/stage 28
4.7. Reference Voltage from Resistor 29
4.8. Sample And Hold Circuit 30
4.9. Power 31
Chapter 5 The implementation of ADC 32
5.1 Switch 33
5.2 Booster circuit 36
5.3 Amplifiers 38
5.4 BIAS circuit 43
5.5 SHA 47
5.6 MDAC 50
5.7 Dynamic Comparator 53
5.10 Digital Correction circuit 62
5.11 Simulation of ADC 63
Chapter 6 Conclusion 67
References 69

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