多輸入多輸出系統是個能有效增進頻寬利用的技術，然而要以合理的硬體複雜度實現多進多出接收器的是個難題。目前大部分的多輸入多輸出接收器都使用最小平方誤差(Minimum Mean-Square Error)，強制歸零(Zero Forcing)和最大相似解(Maximum-Likelihood)來偵測多輸入多輸出訊號。其中強制歸零偵測器是一種低複雜度的簡易偵測器，但效能較需要龐大計算複雜度的最大相似偵測器低。若我們使用替代最大相似解偵測器的K-Best球型解碼(Sphere Decoding)演算法，則能大幅降低系統的複雜度，並且當K-Best球型解碼演算法的K夠大的時，能到達接近最大相似解偵測器的效能。在本篇論文裡，我們將提出的64-QAM K-Best球型解碼演算法實作在硬式輸出(Hard-Output)多輸入多輸出偵測器，使用的是0.18 CMOS奈米製程。晶片核心的面積為3.35mm2，邏輯閘數為22.9萬個，在信號頻率為25MHz解碼吞吐量(Throughput)可以到達3.12Mb/s。

Multiple-input multiple-output (MIMO) is a well-known technique for efficiently increasing bandwidth utilization. However, the implementation of the MIMO receiver with a reasonable hardware cost is a big challenge. Most MIMO receivers exploit minimum mean-square error (MMSE), zero-forcing (ZF) and maximum-likelihood (ML) to detect MIMO signals. Among the detectors, the ZF detector is simple detector with low computational complexity, but lower performance compared to ML decoder, which has huge computational complexity. If the K-Best sphere decoding algorithm (SDA) is adopted, the system complexity can be substantially reduced and the performance can approach that of the ML scheme when the value K is sufficiently large. In this paper, a hard-output MIMO detector is implemented using the K-Best SDA for 4×4 64-quadrature amplitude modulation (QAM) MIMO detection. The implementation is realized by using a 0.18-μm CMOS technology. The implementation chip core area is 3.35mm2 with 229K gates, and the decoding throughput is up to 3.12Mb/s with a 25MHz clock rate.

第一章 導論…………………………………………………………………………1
1.1 背景與研究動機………………………………………………………....…1
1.2 論文架構……………………………………………………………………3
第二章 系統模型……………………………………………………………………4
2.1 通道模型…………………………………………………………………….4
2.2 資料模型…………………………………………………………………….4
第三章 傳統式空時系統解碼器……………………………………………………7
3.1 概述………………………………………………………………………….7
3.2 垂直貝爾實驗室分層空時技術…………………………………………….8
3.3 Alamouti編碼………………………………………………………………8
3.4 線性分散編碼…………………………………………………………...…10
3.5 強制歸零解碼器…………………………………………………………...12
3.6 最小平方誤差解碼器……………………………………………………...13
3.7 垂直貝爾實驗室分層空時解碼器…………………………………..…….13
3.8 最大相似解碼器…………………………………………………………...13
第四章 球型解碼…………………………………………………………………..15
4.1 球型解碼演算法…………………………………………………………...15
4.1.1 深度優先球型解碼演算法…………………………………………15
4.1.2 寬度優先球型解碼演算法…………………………………………15
4.2 提出的球型解碼演算法…………………………………………………...17
4.3 模擬結果…………………………………………………………………...19
4.3.1 提出的K-Best球型解碼偵測器模擬平台架構 …………………..19
4.3.2 提出的K-Best球型解碼偵測器在不同K值下模擬……………..19
4.3.2定點數模擬分析…………………………………………………….21
第五章 硬體實現…………………………………………………………………..23
5.1 提出的硬體架構…………………………………………………………...23
5.1.1運算單元…………………………………………………………….23
5.1.2排序單元…………………………………………………………….23
5.1.3運算時程…………………………………………………………….25
5.2 硬體架構模擬結果………………………………………………………...26
5.2.1設計流程…………………………………………………………….26
5.2.2 硬體描述語言模擬…………………………………………………27
5.2.3邏輯合成…………………………………………………………….29
5.3 測試考量…………………………………………………………………...31
5.4 晶片效能比較……………………………………………………………...32
第六章 結論………………………………………………………………………..34
中英對照表…………………………………………………………………………..35
全名縮寫對照表……………………………………………………………………..38
參考文獻……………………………………………………………………………..39

[1] M. Shafi, D. Gesbert, and P. J. Smith, “MIMO Systems and Applications I,” IEEE J. Sel. Areas Commun., vol. 21, no. 2, pp. 277-280 Apr. 2003.
[2] N. Jayant, “Special Issue on Gigabit Wireless,” in Proc. IEEE, vol. 92, no. 2, pp. 195-197, Feb. 2004.
[3] IEEE Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: High-Speed Physical Layer in the 5 GHz Band, IEEE Std. 802.11a-1999, Sep. 1999.
[4] IEEE Standard for Local and Metropolitan Area Networks, IEEE Std. 802.16-2004, Oct. 2004.
[5] A. Burg and D. Garrett, “VLSI Implementation of MIMO Detection,” in Space-Time Wireless Systems: From Array Processing to MIMO Communications, H. Bölcskei, D. Gesbert, C. Papadias, and A. J. van der Veen, Eds. Cambridge, U.K.: Cambridge Univ. Press, ch. 27, 2005.
[6] A. Burg, N. Felber, and W. Fichtner, “A 50 Mbps 4 × 4 Maximum Likelihood Decoder for Multiple-Input Multiple-Output Systems with QPSK Modulation,” in Proc. IEEE Int. Conf. Electron., Circuits, Syst., 2003, vol. 1, pp. 332-335.
[7] P. W. Wolniansky, G. J. Foschini, G. D. Golden, and R. A. Valenzuela, “V-BLAST: An Architecture for Realizing Very High Data Rates Over the Rich-Scattering Wireless Channel,” in Proc. URSI ISSSE, pp. 295-300, 1998.
[8] H. Yao, and G. W. Wornell, “Lattice-Reduction-Aided Detectors for MIMO Communication Systems,” in Proc. IEEE Global Telecommun. Conf., 2002, pp. 424-428.
[9] D. Wübben, R. Böhnke, V. Kühn, and K.-D. Kammeyer, “Near Maximum-Likelihood Detection of MIMO Systems Using MMSE-Based Lattice-Reduction,” in Proc. IEEE Int. Conf. Commun., 2004, pp. 798-802.
[10] B. Hassibi and H. Vikalo, “On the Expected Complexity of Sphere Decoding,” in Proc. Asilomar Conf. Signals, Syst., Comput., 2001, pp. 1051-1055.
[11] D. L. Milliner and J. R. Barry, “A Lattice-Reduction-Aided Soft Detector for Multiple-Input Multiple-Output Channels,” IEEE Global Telecommun. Conf., Nov. 2006, pp. 1-5.
[12] U. Fincke and M. Pohst, “Improved Methods for Calculating Vectors of Short Length in a Lattice, Including a Complexity Analysis,” Math Comput., vol. 44, pp. 463-471, Apr. 1985.
[13] B. M. Hochwald and S. ten Brink, “Achieving Near-Capacity on a Multiple-Antenna Channel,” IEEE Trans. Commun., vol. 51, no. 3, pp. 389-399, Mar. 2003.
[14] J. B. Anderson and S. Mohan, “Sequential Coding Algorithms: A Survey and Cost Analysis,” IEEE Trans. Commun., vol. 32, no. 2, pp. 169-176, Feb. 1984.
[15] D. Garrett, L. Davis, S. ten Brink, B. Hochwald, and G. Knagge, “Silicon Complexity for Maximum Likelihood MIMO Detection Using Spherical Decoding,” IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1544-1552, Sep. 2004.
[16] K.-W. Wong, C.-Y. Tsui, R. S. Cheng, and W.-H. Mow, “A VLSI Architecture of a K-Best Lattice Decoding Algorithm for MIMO Channels,” in Proc. IEEE Int. Symp. Circuits Syst., pp. III-273-III-276, 2002.
[17] A. Burg, M. Borgmann, M. Wenk, M. Zellweger, W. Fichtner, and H. Bolcskei, “VLSI Implementation of MIMO Detection Using The Sphere Decoding Algorithm,” J. Solid-State Circuits, vol. 40, no. 7, pp. 1566-1577, Jul. 2005.
[18] Z. Guo and P. Nilsson, “VLSI Architecture of the Schnorr-Euchner Decoder for MIMO Systems,” in Proc. IEEE CAS Symp. Emerging Technol., pp. 65-68, 2004.
[19] Z. Guo and P. Nilsson, “Algorithm and Implementation of the K-Best Sphere Decoding for MIMO Detection,” IEEE J. Sel. Areas Commun., vol. 24, no. 3, pp. 491-503, Mar. 2006.
[20] E. Biglieri, G. Taricco, and A. Tulino, “Performance of Space-Time Codes for a Large Number of Antennas,” IEEE Trans. Info. Theory, vol. 48, no. 7, pp. 1794-1803, Jul. 2002.
[21] S. M. Alamouti, “A Simple Transmit Diversity Technique for Wireless Communications,” IEEE J. Sel. Areas Commun., vol. 16, no. 8, pp. 1451-1458, October 1998.
[22] B. Hassibi and H. Vikalo, “On the Sphere-Decoding Algorithm I. Expected Complexity,” IEEE Signal Process. Trans., vol. 53, no. 8, pp. 2806-2818, Aug. 2005.
[23] J. B. Anderson and S. Mohan, “Sequential Coding Algorithms: A Survey and Cost Analysis,” IEEE Trans. Commun., vol. 32, pp. 169-176, Feb. 1984.
[24] M. O. Damen, A. Chkeif, and J. C. Belfiore, “Lattice Code Decoder for Space-Time Codes,” IEEE Commun. Lett., vol. 4, no. 5, pp. 161-163, May 2000.
[25] B. M. Hochwald and S. T. Brink, “Achieving Near-Capacity On a Multiple-Antenna Channel,” IEEE Trans. Commun., vol. 51, no. 3, pp. 389-399, Mar. 2003.
[26] S. Bäro, J. Hagenauer, and M. Witzke, “Iterative Detection of MIMO Transmission Using a List-Sequential Detector,” in Proc. IEEE Int. Conf. Commun., pp. 2653-2657, 2003.
[27] K. W. Wong, C. Y. Tsui, R. S. K. Cheng, and W. H. Mow, “A VLSI Architecture of a K-Best Lattice Decoding Algorithm for MIMO Channels,” in Proc. IEEE Int. Symp. Circuits Syst., pp. 273-276, May 2002.
[28] Y. L. C. Jong and T. J. Willink, “Iterative Tree Search Detection for MIMO Wireless Systems,” in Proc. IEEE Veh. Technol. Conf., Sep. 2002, pp. 1041-1045.
[29] D. L. Ruyet, T. Bertozzi, and B. Özbek, “Breadth First Algorithms for APP Detectors Over MIMO Channels,” in Proc. IEEE Int. Conf. Commun., Jun. 2004, pp. 926-930.
[30] Z. Guo and P. Nilsson, “VLSI Implementation Issues of Lattice Decoders for MIMO Systems,” in Proc. IEEE Int. Symp. Circuits Syst., pp. 477-480, May 2004.