Responsive image
博碩士論文 etd-0808111-165347 詳細資訊
Title page for etd-0808111-165347
論文名稱
Title
應用於多模式CMOS無線接收機之高線性轉導電容式連續濾波器
High linearity Transconductance-C Continuous-Time Filter for Multi-Mode CMOS Wireless Receivers
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
68
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2011-07-21
繳交日期
Date of Submission
2011-08-08
關鍵字
Keywords
浮動電晶體、電流放大器、線性跨導迴路、弱反轉、通道選擇濾波器、低通濾波器、轉導運算放大器
trans-linear loop, OTA, weak inversion, current multiplier, channel selection filter, floating transistor, low pass filter
統計
Statistics
本論文已被瀏覽 5704 次,被下載 427
The thesis/dissertation has been browsed 5704 times, has been downloaded 427 times.
中文摘要
近年來,隨著CMOS製程的進步,將RF接收機整合到SOC晶片中,可以有效的降低生產成本。當在設計無線接收機時,其中一個最重要的技術就是去設計通道選擇濾波器。通常,通道選擇濾波器使用在多標準高頻設計上面將會占用很大的晶片面積以及有較高的消耗功率。因此為了減少面積和消耗功\\率,本篇論文設計出低功率的轉導運算放大器和低通濾波器。

本篇論文提出了一個應用在多模無線通訊接收機的通道選擇濾波器。此濾波器的設計是使用五階巴特沃斯濾波器,其濾波範圍可以應用在Bluetooth,cdma2000, wideband CDMA,和IEEE 802.11a/b/g/n 的無線區域網路。使用浮動電晶體架構在轉導運算放大器的輸入級,可以有效增加THD的效能。利用MOS電晶體操作在三極管區並結合電流放大器可以達到電壓轉換電流的目的。使用線性跨導迴路可以達到寬的可調範圍,並且將轉導運算放大器操作在弱反轉區可以大幅降低轉導值。實作是使用TSMC 0.18μm CMOS 製程。模擬的結果可以證明此濾波器可以操作介於650kHz~22MHz 的頻率範圍。此濾波器可以在不同的無線通訊應用中具有相容性。消耗功率為14.5mW到17.5mW分別為最大到最小的消耗功率,使用的供應電壓是1.2伏特。
Abstract
Recently, with advances in CMOS process, the RF receiver which is integrated into the SOC chip can effectively reduce production costs. When designing the wireless receiver, one of the most important technologies is to design channel-selection filter. Typically, the design of the channel-selection filter in multi-standard high-frequency will take up a large chip area and higher power consumption. Therefore, in order to reduce the area and power consumption, this thesis designed a low-power OTA and low-pass filter.
This thesis presents a multi-mode wireless communication application in the receiver channel selection filter. This filter is designed to use the fifth-order Butterworth low pass filter, the filter range can be used in Bluetooth, cdma2000, wideband CDMA, and IEEE 802.11a/b/g/n wireless LAN. Using floating transistor architecture in the input stage of OTA can effectively increase the THD performance. Using MOS transistors operating in triode region and combined with current multiplier can achieve the voltage-to-current conversion. Using the trans-linear loop can reach a wide tunable range, and the OTA operating in weak inversion region can significantly reduce the transconductance. Implementation is to use the TSMC 0.18μm CMOS process. Simulation results show that the successful operation of this filter can be between 650 kHz ~ 22MHz frequency range. The filter may have compatibility in different wireless communication applications. 14.5mW to 17.5mW, respectively, is the smallest to the largest power consumption. The supply voltage is 1.2 volts.
目次 Table of Contents
CHAPTER 1 INTRODUCTION 1
1.1 Motivation 3
1.2 Research Objectives 4
1.3 The Organization of This Thesis 7
CHAPTER 2 Transconductor 8
2.1 Introduction 8
2.2 Review of Transconductors 8
2.2.1 Source Degeneration Transconductor 9
2.2.2 Constant Drain Source Transconductor 11
2.2.3 Pseudo Differential Transconductor 13
2.2.4 Multiple Input Floating Gate Transconductor 15
CHAPTER 3 Gm-C Filter 17
3.1 The Basic Building Block of OTA 17
3.2 The Implement of Passive Components 19
3.2.1 Equivalent Resistor 19
3.2.2 Equivalent Inductor 21
3.3 Passive Component Replacement 26
CHAPTER 4 A High Linearity OTA and Wide Tuning Range Gm-C Filter 28
4.1 Introduction 28
4.2 The Design of Transconductor Circuit 29
4.2.1 Constant drain source voltage with Op-Amps 30
4.2.2 The Proposed Transconductor 31
4.2.3 The Proposed Transconductor with tuning Scheme 34
4.2.4 Common Mode Feedback Circuit 37
4.2.5 The Final Circuit Implementation 39
4.3 Filter Design 41
4.3.1 Passive 5th order Butterworth Low Pass filter 41
4.3.2 Fifth-order Butterworth Low Pass Gm-C Filter 43
CHAPTER 5 Measurement and Simulation Result 45
5.1 Measuring consideration 45
5.2 Pre-simulation results of OTA and filter 46
5.3 Post-simulation results of OTA and filter 48
CHAPTER 6 Conclusion and Future work 53
6.1 Conclusion 53
6.2 Future work 53
Reference 54
參考文獻 References
[1] 新通訊元件網路雜誌, http://www.2cm.com.tw/coverstory_content.asp?sn=0804210009
[2] David Chamla, Andread Kaiser, Andreia Cathelin, and Didier Belot, “A Gm-C Low-pass Filter for Zero-IF Mobile Applications With a Very Wide Tuning Range,” IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1443-1450, July 2005.
[3] Mohammed Ismail and T. Fiez, Analog VLSI Signal and Information Processing. New York: McGraw-Hill, 1994.
[4] S. R. Zarabadi, M. Ismail, and C. C. Hung, “High performance analog VLSI computational circuits,” IEEE J. Solid-State Circuits, vol. 33, no. 4, pp. 644–649, Apr. 1998.
[5] Tien-Yu Lo, Chung-Chih Hung, and Mohammed Ismail, “A wide tuning range Gm-C filter for multimode directconversion wireless receivers,” Proc. IEEE Eur. Solid-State Circuits Conf., pp. 210–213, 2001.
[6] Tien-Yu Lo, Chung-Chih Hung, “A wide tuning range Gm-C continuous-time analog filter,” IEEE Trans. Circuits Syst. I: Reg. Papers., vol. 54, no. 4, pp. 713–722, Apr. 2007.
[7] J. Galan, R. G. Carvajal, A. Torralba, F. Munoz, and J. Ramirez-Angulo, “A low-power low voltage OTA-C sinusoidal oscillator with a large tuning range,” IEEE Trans. Circuits Syst. I: Reg. Papers., vol. 52, no. 2, pp. 283–291, Feb. 2005.
[8] J. van Engelen, R. van de Plassche, E. Stikvoort, and A. Venes, “A sixth-order continuous-time bandpass sigma–delta modulator for digital radio IF,” IEEE J. Solid-State Circuits, vol. 34, pp. 1753–1764, no. 12, Dec. 1999.
[9] E.S′anchez-Sinencio and J. Silva-Martinez, “CMOS transconductance amplifiers, architectures and active filters: A tutorial,” Proc. IEEE Circuits Devices Syst., vol. 147, no. 1, pp. 3–12, Feb. 2000.
[10] Tien-Yu Lo, Chung-Chih Hung, “A High Speed Pseudo-Differential OTA with Mobility Compensation Technique in 1-V Power Supply Voltage,” A-SSCC Dig. Tech. Papers, pp. 163-166, Nov. 2006.
[11] A. E. Mourabit, G.-N. Lu, and P. Pittet, “Wide-linear-range subthreshold OTA for low-power, low-voltage, and low-frequency applications,” IEEE Trans. Circuits Syst. I: Reg. Papers., vol. 52, no. 8, pp. 1481–1488, Aug. 2005.
[12] E. Rodriguez-Villegas, A. Yufera, and A. Rueda, “ A 1.25-V micropower Gm-C filter based on FGMOS transistors operating in weak inversion,” IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 100–111, Jan. 2004.
[13] Rolf Schaumann and Mac E. van Valkenburg, Design of Analog Filters, New York, USA, Oxford University Press, 2001.
[14] A. Veeravalli, E. Sánchez-Sinencio, and J. Silva Martínez, “Transconductance amplifiers structures with very small transconductances: A comparative design approach,” IEEE J. Solid-State Circuits, vol. 37, no. 6, pp. 770–775, Jun. 2002.
[15] P. Garde, “Transconductance cancellation for operational amplifiers,” IEEE J. Solid-State Circuits, vol. SC-12, pp. 310–311, June 1977.
[16] David Johns, Ken Martin. Analog Integrated Circuit Design. John Wiley & Sons, Inc., United States: 1997.
[17] H. Zare-Hoseini, I. Kale, C. S. Morling, “ Highly linear transconductance topology using floating transistors,” IEE Electronics letters, Vol. 42, No. 1, pp. 3-4, Jan. 2006.
[18] K. Kimura, “A linear transconductance amplifier obtained by realizing a floating resistor,” IEEE Trans. Circuits Syst. I: Reg. Papers., vol. 45, no. 1, pp. 108–3113,Jan. 1998.
[19] A. Hasting. The Art of Analog Layout. Englewood Cliffs, NJ: Pren-tice-Hall, 2001.
[20] Tien-Yu Lo, Chung-Chih Hung, and Mohammed Ismail, “A Wide Tuning Range Gm-C Filter for Multi-Mode CMOS Direct-Conversion Wireless Receiver,” IEEE J. Solid-State Circuits, vol. 44, no. 9, pp. 2515-2523, September 2009.
[21] Ramirez-Angulo, J. and Lopez-Martin A., “A −72 dB @ 2 MHz IM3 CMOS tunable pseudo-differential transconductor,” IEEE International Symposium on Circuits and Systems, pp. 73- 76, 2008.
[22] Belén Calvo and Santiago Celma, “Low-Voltage Linearly Tunable CMOS Transconductor with Common-Mode Feedforward,” IEEE Trans. Circuits Syst. I: Reg. Papers., vol. 55, pp. 715-721, 2008.
[23] Ngamkham, W. and Kiatwarin, N., “A linearized source-couple pair transconductor using a low-voltage square root circuit,” 5th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, vol. 2, pp. 701-704, 2008.
[24] S. Hori, T. Maeda, N. Matsuno, and H. Hida, “Low-power widely tunable Gm-C filter with an adaptive DC-blocking, triode-biased MOSFET transconductor,” Proc. IEEE Eur. Solid-State Circuits Conf., pp. 99–102, 2004.
[25] David Chamla, Andread Kaiser, Andreia Cathelin, and Didier Belot, “A Gm-C Low-pass Filter for Zero-IF Mobile Applications With a Very Wide Tuning Range,” IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1443-1450, July 2005.
[26] S. D’Amico, V. Giannini, and A. Baschirotto, “A 4th-order active-Gm-RC reconfigurable (UMTS/WLAN) filter,” IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1143–1450, Jul. 2006.
[27] B. Razavi, Design of Analog CMOS Integrated Circuit. New York: McGraw-Hill,2001.
[28] T.Y. Lo and C.C. Hung, 1V CMOS Gm-C Filters: Design and Applications, Springer, Apr. 2009.
[29] 高維均,2009,“應用於心律調節器之超低功率帶通濾波器”, 國立中正大學電機工程研究所, 碩士論文
[30] Ridwan Saleh Mulyana., “A Low Voltage, Low Power 4th Order Continuous-time Butterworth Filter for Electroencephalography Signal Recognition,” M.S. thesis, Dept. Electrical and Computer Eng., Ohio State Univ., Ohio State, USA, 2010.
[31] E. Seevinck, E. Vittoz, M. D. Plessis, T. H. Joubert, and W. Beetge, “CMOS translinear circuits for minimum supply voltage,” IEEE Trans. Circuits Syst. II: Reg. Papers., Analog Digit. Signal Process, vol. 47, no. 12, pp.1560–1564, Dec. 2000.
[32] J.F. Duque-Carrillo, “ Control of the Common-Mode Component in CMOS Continuous-Time Fully Differential Signal Processing,” Analog Integrated and Signal Processing, Vol. 4, No.2, pp131-140, Sept 1993.
電子全文 Fulltext
本電子全文僅授權使用者為學術研究之目的,進行個人非營利性質之檢索、閱讀、列印。請遵守中華民國著作權法之相關規定,切勿任意重製、散佈、改作、轉貼、播送,以免觸法。
論文使用權限 Thesis access permission:自定論文開放時間 user define
開放時間 Available:
校內 Campus: 已公開 available
校外 Off-campus: 已公開 available


紙本論文 Printed copies
紙本論文的公開資訊在102學年度以後相對較為完整。如果需要查詢101學年度以前的紙本論文公開資訊,請聯繫圖資處紙本論文服務櫃台。如有不便之處敬請見諒。
開放時間 available 已公開 available

QR Code