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博碩士論文 etd-0808111-213418 詳細資訊
Title page for etd-0808111-213418
論文名稱
Title
應用於電力線傳輸通訊之數位晶片設計與實現
The Design and Implement of Digital Chip for Power Line Communication
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
69
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2011-07-21
繳交日期
Date of Submission
2011-08-08
關鍵字
Keywords
電力線通訊、微小加密演算法、二元BCH碼、頻率鍵移調解調、數位脈寬調變
FSK demodulation, Binary BCH code, TEA, Power line communication, DPWM
統計
Statistics
本論文已被瀏覽 5749 次,被下載 287
The thesis/dissertation has been browsed 5749 times, has been downloaded 287 times.
中文摘要
近年來,電力線通訊的發展與應用逐漸受到矚目,運用電力線系統達到家用電力網路自動化、自動能源電表讀取和電源控制管理,對現在講求節能的理念,有十分大的幫助,因此受到許多國際組織和國家型計畫投入研究。透過電力線傳輸訊號過程中,容易受到環境因素的影響,造成傳輸資料錯誤,而降低了對電力線通訊的使用。為了能夠有效利用電力線通訊系統,本論文主要目的在研究經由電力線傳輸訊息時,保證資料的正確性、完整性和安全性,設計了應用於電力線通訊的數位晶片。

我們藉由晶片實現將訊號透過電力線做半雙工傳輸,並解決在傳輸中發生資料錯誤的問題。透過數位電路模組設計對資料進行加解密、糾正資料的錯誤位元、偵測資料是否發生錯誤、控制訊號的處理和訊號調變與解調,目的都在增加資料傳輸的正確率。此晶片設計採用TSMC 0.18μm製程,為全數位電路設計,並應用於能源電表管理。
Abstract
In recent years, the development of power line communication and relational application is gradually attracted much attention. The use of power line system is able to achieve home network automation, automatic meter reading, and demand supply management, so it can be a great help for the current emphasis on energy conservation ideas. Therefore, many international organizations and national programs involve in researches. The signal is vulnerable to the environment causing data error in the power line transmission, so that we reduce the use of power line communication. For making great application of power line system, the main purpose of the thesis is to study that ensure the data accuracy, integrity and security through power line transmission. Therefore, we designed the digital chip for power line communication.

We achieve the signal transmission with the half-duplex ability through power line by digital chip designing and solve error problems about transmitting data. By designing the modules of digital circuit, the chip can encrypt/decrypt data, correct error-bits of data, detect accuracy of data, process control signals, and modulate/demodulate signals. The purpose is for increasing data accuracy in PLC transmission. The chip design adopts TSMC 0.18μm process as full digital circuits and applies to the energy meter management.
目次 Table of Contents
CHAPTER 1 INTRODUCTION 1
1.1 Motivation 1
1.2 Research purpose and contribution 2
1.3 Thesis Organization 4
CHAPTER 2 THE THEORY OF POWER LINE COMMUNICATION 5
2.1 PLC Theory 5
2.1.1 PLC Intorduction 5
2.1.2 PLC Application 6
2.1.3 PLC Transmitting method 6
2.2 PLC Circuit Structure 7
2.3 Transmitting Data Format 8
2.4 Modulation Techniques 9
2.4.1 Signal Modulation 9
2.4.2 Pulse Modulation 11
CHAPTER 3 PLC TRANSMITTER DESIGN 13
3.1 Cyclic Redundancy Check 13
3.1.1 CRC Theory 13
3.1.2 CRC Generator 15
3.2 Tiny Encryption Algorithm 17
3.2.1 TEA Operation 17
3.2.2 TEA Encoder 19
3.3 Binary BCH Code 22
3.3.1 BCH Code Overview 22
3.3.2 BCH Encoder 24
3.4 Interleaving 26
3.4.1 Interleaving Technique 26
3.4.2 Interleaver 27
3.5 Digital PWM Modulator 29
CHAPTER 4 PLC RECEIVER DESIGN 31
4.1 Digital FSK Demodulator 31
4.2 Deinterleaver 34
4.3 BCH Decoder 35
4.3.1 Binary BCH Code Theory 35
4.3.2 Computing Syndrome Module 36
4.3.3 Finding Error Pattern Module 38
4.3.4 Error Correcting Module 40
4.4 TEA Decoder 42
4.5 CRC Detector 43
CHAPTER 5 MEASUREMENT RESULT 44
5.1 Verification Flow 44
5.2 Simulation Result 45
5.3 Measurement Result 49
5.3.1 IC Measurement 49
5.3.2 PLC Test 51
5.4 Chip Specification 54
CHAPTER 6 CONCLUSION AND FUTURE WORK 55
6.1 Conclusion 55
6.2 Future Work 55
Reference 56
參考文獻 References
[1] 李淑敏、郭可驥、王朝欽與陳朝順,2008,節能通信 IC 晶片開發與智慧型電能管理系統整合研究,NSC98-2220-E-110-009。
[2] Jia-Wi Guo, “A modulation/demodulation chip design with error correctable and high error detected ability for Power Line Communication,” Department of Computer Science and Engineering, National Sun Yat-sen University, Master Thesis, 2011.
[3] 劉建邦,2007,<基於OSC-ANF之PLC系統的規劃及研究>,頁4-9,逢甲大學電機工程系碩士在職專班碩士論文。
[4] J. Machacek and J. Drapela, “Control of serial port (RS232) communication in LabVIEW,” International Conference on ModemTechnique and Technologies, pp. 36-40, 2001.
[5] W. W. Peterson, and D. T. Brown, “Cyclic Codes for Error Detection”, Proceedings of the IRE 49: 228, Jan. 1961.
[6] S. Shukla, and N.W. Bergmann, “Single bit error correction implementation in CRC-16 on FPGA,” 2004 IEEE International Conference, pp. 319-322, 2004.
[7] Roger M. Needham, and David J. Wheeler., “TEA, a tiny encryption algorithm,” Lecture Notes in Computer Science, vol. 1008, pp. 363-366, 1994.
[8] 陳俊麟,2004,<於Auto-ID的環境中使用加密傳輸>,頁15-24,國立交通大學資訊管理研究所碩士論文。
[9] Vikram Reddy Andem, "A Cryptanalysis of the Tiny Encryption Algorithm," Master thesis, The University of Alabama, Tuscaloosa, 2003.
[10] Massey, J. L., “Step-by-Step Decoding of Bose-Chauhuri-Hocquenghem Codes,” IEEE Trans. Inform. Theory, vol. 11, no. 4, pp. 580-585, Nov. 1965.
[11] Chr, C., Su, S. L. and Wu, S. W., “New Step-by-Step Decoding for Binary BCH Codes,” The Ninth International Conf. on Commun. Systems, 2004. ICCS 2004, pp. 456–460, 6-8 Sept. 2004.
[12] 林銀議,2005,《數位通訊原理-編碼與消息理論》,頁117-168,台北:楊榮川.
[13] Jun Zhang, Zhi-Gong Wang, Qing-Sheng Hu and Jie Xiao, “Optimized Design for High-speed Parallel BCH Encoder,” IEEE Int. Workshop VLSI Design & Video Tech., pp. 97-100, 2005
[14] B. Patella, A. Prodi'c, A. Zirger, and D. Maksimovi'c, "High-frequency digital PWM controller IC," IEEE Transactions on Power Electronic Circuits, vol. 18, Jan 2003.
[15] A. Prodic, D. Maksimovic, and R. Ericson, “Design and implementation of a digital PWM controller for a high-frequency switching DC-DC power converters,” Proc. IEEE IECON Conf., pp. 331-362, 2002.
[16] E. Grayver and B. Daneshrad, “A Low-Power All-Digital FSK Receiver for Space Applications,” IEEE Transactions on Communications, vol. 49, no. 5, pp. 911-921, May 2001
[17] H. M. Hamed, A.E. Salama, and M. Zaghloul, “A Self Synchronizing Digital FSK Demodulator for Applications with Transmission Rate Comparable to the Carrier Frequencies”, Proceedings of the 11th IEEE Mediterranean Electro technical Conference, May 2002.
[18] R. M. Weng, S. Y. Li, and J. C. Wang, “Low Power Frequency-Shift Keying Demodulators for Biomedical Implants,” IEEE Conference on Electron Devices and Solid-State Circuits, pp. 1079-1082, Dec. 2007.
[19] C. L. Chr, S. L. Su, and S. W. Wu, “New step-by-step decoding for binary BCH codes”, The Ninth International Conference on Communications Systems, pp.456, September 2004
[20] Laurie L. Joiner, and John J. Komo, “Decoding Binary BCH Codes,” IEEE Trans., 1995.
[21] A. Dur, “Avoiding decoder malfunction in the Peterson-Gorenstein-Zierler decoder,” IEEE Trans. Information Theory, vol. 39, pp. 640-643, March 1993.
[22] M. Kuijper, “A system-theoretic derivation of the Welch-Berlekamp algorithm,” in Proc. 2000 IEEE Int. Symp. Information Theory, Sorrento, Italy, p. 418, June 2000.
[23] Huapeng Wu, “Bit-Parallel Finite Field Multiplier and Squarer Using Polynomial Basis”, IEEE Transactions on Computers, vol.51, no. 7, pp.750-758, July 2002.
[24] Shayan, Y.R., Le-Ngoc, T. and Bhargava, V.K., "A Binary-Decision Approach to Fast Chien Search for Software Decoding for BCH Codes", IEEE Proceedings, Part F, pp. 629-632, October 1987.
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