本論文是有關於三種應用於生醫積體電路之濾波器研讀與設計，其中包含一個二階中低頻高通濾波器(設計一)，一個二階高頻低通濾波器(設計二)以及一個一階低頻高通濾波器(設計三)。設計一與設計二主要用於晶片安全監測系統，主要功能為分離生理訊號與高頻測試訊號。設計三應用於心電圖適應性取樣系統，本論文不包含其詳細的應用部分。設計一主要由轉導放大器與電容所組成，濾波器是採用文獻中一全差動二階高通濾波器，並使用傳統折疊轉導放大器去實現此全差動二階高通濾波器，藉由適當設計轉導放大器之電晶體外觀比以達成我們的生醫系統所需之濾波器規格。其post-layout模擬所得截止頻率為316 kHz，在輸入信號頻率1 MHz、峰峰值為2 V的總諧波失真為-40.14 dB。
設計二也是由轉導放大器與電容所組成，為了克服轉導放大器線性度導致訊號失真的問題，本論文採用對稱與非對稱差動對設計一線性化轉導放大器，並使用具共模回授的傳統閘級電壓控制之負電阻使轉導放大器具高輸出阻抗，此共模回授電路穩定輸出的偏壓點。使用此線性轉導放大器去實現一個全差動二階低通濾波器，藉由適當設計此轉導放大器之電晶體外觀比以達成我們的生醫系統所需之濾波器規格。濾波器post-layout模擬所得截止頻率為12.93 MHz，在輸入信號頻率10 MHz、峰峰值為1 V時的總諧波失真為-47.14 dB，從0~13 MHz積分雜訊為184μVrms。
設計三使用基底-汲極連接組態之電晶體偏壓成一高電阻值之主動電阻，並將其應用於一階電阻電容濾波器設計。其截止頻率為647 Hz，面積消耗約 0.012 mm2。
測試晶片採用TSMC 0.35 μm CMOS製程製作，本論文包含設計一與設計三之測試結果，測試結果證實此二濾波器之操作。

This thesis is concerned with the study and design of three integrated filters for biomedical applications. The following designs are considered: A 2nd-order high-pass filter with low cut-off frequency (Design 1), a 2nd-order low-pass filter with high cut-off frequency (Design 2), and a 1st-order high-pass filter with low cut-off frequency (Design 3). Design 1 and 2 are intended for separating the physiological signal and a high-frequency test signal in the application of a chip safety monitoring system. Design 3 finds its application in a system for adaptive sampling of the electrocardiogram. The details of the applications are not part of this thesis.
Design 1 is composed of operational transconductance amplifier (OTA) and capacitances. The thesis adopts an 2nd-order fully-differential HP filter and uses conventional folded-cascode OTAs to realize the fully-differential HP filter. By proper designing the transistor sizes of the OTA, the HP filter can achieve specific specification in
our biomedical system. Its post-layout simulated cut-off frequency is 316 kHz and the total harmonic distortion is -40.14dB with a 1MHz 2 Vp-p input signal.
Design 2 is also composed of OTA and capacitances. To overcome the linearity problem of OTA, so-called symmetrical and asymmetrical differential pairs are utilized to design a more linear transconductor. Moreover, a conventional gate voltage-controlled negative resistor circuit with CMFB circuit is used to create the required high output
impedance of the OTA. The CMFB circuits are used to stabilize the output dc level in the OTA. The OTA is used to realize a fully-differential 2nd-order LP filter. By proper designing the transistor sizes of the OTA, the filter can achieve specific specification in our biomedical system. The filter’s post-layout simulated cut-off frequency is 12.93 MHz and the total harmonic distortion is -47.14 dB with a 10 MHz 1 Vp-p input signal.
Design 3 uses an RC filter design with bulk-drain connected MOS transistors biased as an active high-value resistor. A cut-off frequency of 647 Hz is thus achieved on an active area of 0.012 mm2.
Test chips were fabricated in TSMC 0.35 μm CMOS technology for Designs 1 and 3 and the measured results are reported, confirming the operation of the filters.

CHAPTER 1
INTRODUCTION 1
1.1 Background.. 1
1.2 Description of this thesis .. 2
CHAPTER 2
EQUIVALENT CIRCUIT AND APPLICATIONS OF OTA. 4
2.1 Operational Transconductor Amplifiers 4
2.1.1. Equivalent circuit of Operational Transconductor Amplifiers .. 4
2.1.2. Comparison between single-end and differential output OTA.. 5
2.2 Simple Applications of OTA .. 6
2.2.1. Resistor implementation using OTAs. 6
2.2.2. Inductor implementation using OTAs 8
2.2.3. Voltage amplifier and adder. 9
2.2.4. Integrator 10
CHAPTER 3
2nd-ORDER HIGH-PASS OTA-C FILTER USING CONVENTIONAL
FOLDED-CASCODE OTA. 12
3.1 Motivation . 12
3.2 Calculation and Analysis of a 2nd-order Fully-differential HP Filter 13
3.3 Parasitic capacitance effect 19
3.4 Fully-differential OTA Structure and Buffer 20
3.4.1. Fully-differential folded-cascode OTA circuit. 21
3.4.2. Buffer 23
3.5 Simulation result. 23
3.6 Circuit Layout.. 28
CHAPTER 4
2nd-ORDER LOW-PASS OTA-C FILTER USING LINEARIZED CMOS OTA.. 29
4.1 Motivation and Background . 29
4.1.1. Linearity Analysis of a Fully-differential Pair. 29
4.1.2. Linearization Techniques 32
4.1.2.1. Source Degeneration . 32
4.1.2.2. Voltage-Controlled Cross-Coupled Cell . 34
4.1.2.3. The symmetrical and asymmetrical cross-coupled transistor pairs
linearization . 35
4.1.2.4. Comparison of techniques .. 37
4.1.3. Second Order Effects 38
4.2 2nd-order Fully-differential LP Filter Using Linear OTA with CMFB Circuit and Gate Voltage-Controlled Negative Resistance Load 38
4.2.1. Gate Voltage-Controlled Negative Resistance Load with CMFB Circuit . 39
4.2.2. Common-Mode Feedback Circuit . 42
4.2.3. The OTA Circuit Architecture and Simulated Results. 43
4.2.4. General 2nd-order Fully-differential LP Filter [1].. 46
4.2.5. Simulation Result .. 47
4.2.6. Circuit Layout.. 52
CHAPTER 5
THE ACTIVE HIGH-VALUE RESISTOR USING TWO BULK-DRAIN
CONNECTED TRANSISTORS 53
5.1 Motivation and Background . 53
5.1.1. Capacitor Scaling 54
5.1.2. Transconductance reduction techniques . 55
5.1.3. MOS resistor biased in linear region 56
5.2 High-value Tunable CMOS Resistor 57
5.3 Simulation Result .. 58
CHAPTER 6
MEASUREMENT RESULTS 60
6.1 Measurement of 2nd-order Fully-differential HP Filter .. 60
6.2 High-value tunable CMOS resistor using bulk-drain connected transistors 62
CHAPTER 7
CONCLUSIONS AND FUTURE WORK.. 64
7.1 Conclusions .. 64
7.2 Future work .. 64
References.. 66

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