針對三維晶片的研究多著重於熱對三維晶片良率的影響，但是當晶片堆疊在一起時也有可能影響到其良率，因此本研究針對三維晶片結合後所導致的交連線及TSV進行測試及診斷；並依據垂直振盪環搜尋及測試診斷的先後順序分成HVOR(先水平再垂直)和VHOR(先垂直再水平)兩種測試及診斷架構。
我們所提出的HVOR及VHOR兩種三維振盪環測試及診斷方法因為結構上的關係，雖然比IORT(二維振盪環測試及診斷)多了43%及23%的振盪環數量才能達到100%的錯誤涵蓋率，但是(1)就診斷上來說HVOR與VHOR分別比IORT少了17%及23%的振盪環，且(2)在測試平行度上，HVOR是IORT的1.22倍，而VHOR是IORT的1.72倍。

This paper proposes a multitier multilevel TSV diagnosis scheme for 3D ICs to achieve interconnect reliability and yield with targets of interconnect faults under stuck-at and open fault models. This scheme takes advantage of previous work of IEEE 1500 compatible interconnect test and diagnosis methods, and further develop a TSV detection and diagnosis method for 3D circuits. An interconnect diagnosis scheme based on the oscillation ring (OR) test methodology for 3D systems-on-chip (SOC) designs with heterogeneous cores is proposed. The large number of test rings in the SOC design, however, significantly complicates the interconnect diagnosis problem. In this paper, the diagnosability of an interconnect structure is first analyzed then a fast diagnosability checking algorithm and an efficient diagnosis ring generation algorithm are proposed. It is shown in this paper that the both vertical and horizontal ring generation algorithm achieves the maximum detectability for any interconnect.

Contents i
List of Tables iii
List of Figures iv
致謝 vi
Chapter 1 簡介 1
1.1 研究動機 1
1.2 論文貢獻 5
Chapter 2 先前研究 6
2.1 二維振盪環測試及診斷 6
Chapter 3 問題定義 9
3.1 矽穿孔(Through-Silicon-Via, TSV) 9
3.2 TSV建立垂直振盪環及虛擬交連線 11
3.3 垂直振盪環(Vertical Oscillation Ring, VOR)模型(Modeling) 13
Chapter 4 振盪環產生演算法及診斷 15
4.1 振盪環架構 15
4.1.1水平振盪環 (Horizontal Oscillation Ring, HOR) 15
4.1.2垂直振盪環(Vertical Oscillation Ring, VOR) 15
4.2 交連線診斷 19
4.2.1 TSV-Last (HVOR) 19
4.2.2 TSV-First (VHOR) 21
Chapter 5 實驗結果 23
5.1 實驗設定 23
5.2 實驗結果 24
5.2.1二維晶片與三維晶片之比較 25
5.2.2兩種診斷方式(HVOR及VHOR)的比較 26
5.3 案例研究 (Case Study: Scaled hp) 30
5.3.1多層三維晶片與TSV分佈密度 31
5.3.2多層三維晶片之測試及診斷 34
Chapter 6 結論 40
參考文獻 42

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