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博碩士論文 etd-0813107-163601 詳細資訊
Title page for etd-0813107-163601
論文名稱
Title
多重電壓系統的低功率對應與管線化排程方法
Energy-efficient mapping and pipeline for the multi-resource systems with multiple supply voltages
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
78
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2007-07-26
繳交日期
Date of Submission
2007-08-13
關鍵字
Keywords
多重電壓系統、塔布搜尋、管線化排程、系統層級低功率、電壓對應、工作對應
tabu search, pipeline schedule, Task mapping, system level low power, voltage mapping, DVS
統計
Statistics
本論文已被瀏覽 5702 次,被下載 1466
The thesis/dissertation has been browsed 5702 times, has been downloaded 1466 times.
中文摘要
隨著系統晶片的快速發展,使得低功率高效能的設計也變成了重要的課題。系統晶片功\率消耗是由硬體和軟體構成,針對低功率這個問題,電路方面提供了多電壓的方式來降低工作的功\率消耗。因此設計工具除了必須決定每一個工作要在那種資源和那種電壓下執行,使得整體功率消耗達到最少,並且需要將週期性工作安排管線化排程,使得整體系統總處理能力大幅提升。在本論文中,我們設計了一個塔布演算法來同時解決工作電壓對應和資源對應問題,此演算法主要目標是在多重電壓的系統下,考慮時間限制和資源限制來求得較好的解。為了應用在系統上,我們建立了一個管線化排程設計流程並且把塔布演算法內嵌進去。在同樣的效能限制下,先利用塔布演算法來找出多個工作電壓對應和資源對應的解,再利用線性管線化排程決定工作的排程、資料傳輸的排程和檢查所有解的正確性,從塔布演算法產生的所有解中,挑出其中最好的解。實驗結果顯示,我們的塔布演算法和線性管線化排程可以在短時間內決定系統對應及排程並且能有效降低功\率消耗。
Abstract
Since the development of SoC is very fast, how to reduce the power consumption of SoC and improve the performance of SoC has become a very important issue. The power consumption of a system depends upon the hardware and software of a system. To overcome the issue of power consumption, the hardware circuit provides multi-voltage method to reduce task power consumption. On the other hand, the software tool decides the exact voltage for each task to minimize the total power consumption and finds a pipelined schedule of the periodic tasks to enhance the total throughput. In this thesis, a Tabu search is used to solve the voltage mapping and resource mapping problems of multi-voltage systems. This goal of this Tabu search is to find the solution with minimal power consumption for the multi-voltage system under the time constraints and resource constraints at the same time in the multi-voltage system to. Under the throughput constraints we use Tabu search to find solutions including the task’s execution voltage and resource mapping, and then use list pipelined scheduling to schedule task and data communication and check their correctness. This method can reduce total power consumption. Experimental results show that our proposed algorithm can decide the resources mapping and pipeline in seconds, and it can reduce the power consumption efficiently.
目次 Table of Contents
FIGURE LIST V
TABLE LIST VI
CHAPTER1. INTRODUCTION 1
1.1 Background 1
1.2 Motivation and Main Contributions 1
1.3 Thesis Organization 2
CHAPTER2. RELATED WORKS 3
CHAPTER3. PROBLEM DEFINITION AND ASSUMPTIONS 14
3.1 Problem Definition 14
3.2 Assumptions 15
3.3 Target Architecture 17
CHAPTER4. TABU SEARCH 19
CHAPTER5. PIPELINED SCHEDULE 27
5.1 The Flow of Proposed Algorithm 27
5.2 The Five Categories of the Pipeline Schedule 29
5.3 List Based Schedule (CNPT) 33
5.4 Proposed Pipeline Schedule 35
CHAPTER6. EXPERIMENTAL RESULTS 47
6.1 DFG and MLIB 48
6.2 Tabu Length 49
6.3 The Delay and Best-Fit Technique In Pipeline Schedule 53
6.4 Diversification Versions 56
6.5 Final Results 60
CHAPTER7. CONCLUSION 64
REFERENCE 65
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