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博碩士論文 etd-0813109-165733 詳細資訊
Title page for etd-0813109-165733
論文名稱
Title
適用於穿戴式資料記錄的MMC控制器及前端放大器
A MMC Controller for Wearable Data Logging and Front-end Amplifier
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
82
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2009-07-23
繳交日期
Date of Submission
2009-08-13
關鍵字
Keywords
橫向雙極性接面電晶體、前端放大器、類比數位轉換器、SPI模式、多媒體記憶卡
MultiMediaCard, SPI mode, Front-end amplifier, ADC, lateral BJT
統計
Statistics
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中文摘要
市場上有許多不同種類的商品化記憶卡,因為現代科技的進步,這些記憶卡有著大容量、低功\\耗以及容易取得等優點。因此使用商品化記憶卡的資料記錄系統是很方便且經濟的作法。
本論文旨在介紹一個適用於生理訊號記錄的可穿戴式資料記錄系統。由一個前端放大器、類比數位轉換器、和記憶卡控制器組成此系統的基礎。前端放大器使用切換電容式架構,所以輸出波形在時域上是不連續的訊號。因為不必持續對輸出端的電容性負載充電,所以帶來了節省功率的好處。訊號輸入端選用CMOS製程中的橫向(lateral)雙極性接面電晶體來製做。接著使用常見的類比數位轉換器將放大後的訊號轉換成數位資料。最後挑選了多媒體記憶卡(MultiMediaCard)為大容量儲存裝置。
另外,將資料連續寫入多媒體記憶卡的控制器之設計及實現,敘述在本論文中。特別要注意的是,為了將控制器整合於其他晶片,亦試著達到小晶片面積、低複雜度、低功耗等條件。初步的記憶卡控制器實現於可程式邏輯閘陣列(FPGA)中,由其得到了測量的結果,並且展現了完整功能的資料記錄器電路。
Abstract
There are many kinds of commercial memory cards on the market. Due to great improvements in modern technology, they have great amounts of capacity, low power consumption, and are easily available. Therefore a data logging system using a commercial memory card is a convenient and economic procedure.
This thesis introduces a wearable data logging system for physiological recording. A front-end amplifier, analog to digital converter, and a memory card controller compose the basis of this system. The front-end amplifier uses a switched-capacitor structure, so the output waveform is discrete in regard to the time domain. This brings an advantage in saving power for not keeping charging the load capacitance. Lateral bipolar transistors fabricated in a CMOS process are used as input devices. A conventional ADC is used to convert the amplified signal into digital data. Finally MultiMediaCard is chosen as a large storage space. This thesis contributes the analysis, design and measurement of the amplifier front-end.
In addition, the design and implementation of a controller circuit for sequential data storage into the MultiMediaCard memory is described. Special attention was paid to achieving a small area, low-complexity and low-power implementation suitable for integration. Measured results obtained from a preliminary FPGA implementation are reported and the functionality of a complete logger circuit is demonstrated with measured results.
目次 Table of Contents
ACKNOWLEDGEMENTS ......................................................................................... i
摘要............................................................................................................................... ii
Abstract ....................................................................................................................... iii
TABLE OF CONTENTS .............................................................................................. iv
LIST OF TABLES ....................................................................................................... vi
LIST OF FIGURES ................................................................................................... vii
Chapter 1 MOTIVATION ........................................................................................... 1
Chapter 2 A CONTROLLER FOR THE MultiMediaCard .................................... 4
2.1. Introduction ................................................................................................... 4
2.2. Research Purpose .......................................................................................... 5
2.3. Introduction to the SPI Mode ...................................................................... 7
2.3.1. The SPI Mode Pin Definition .............................................................. 8
2.3.2. Transmission Frame Definition............................................................ 9
2.4. MMC Controller Design and Implementation ......................................... 12
2.4.1. I/Os of the MMC Controller .............................................................. 12
2.4.2. Different configurations of the controller .......................................... 15
2.4.3. Implemented Commands ................................................................... 15
2.4.4. Algorithm of MMC Controller Operation .......................................... 16
2.4.5. Buffer Mechanism ............................................................................. 17
2.4.6. Mechanism of the Dynamic Clock CLK_MMC ................................. 22
2.5. Measurement Setup .................................................................................... 24
2.5.1. Verilog Modules ................................................................................. 25
2.5.2. Hardware Connection ........................................................................ 27
2.5.3. Operation of the Test Environment .................................................... 29
2.6. Measured Results ........................................................................................ 30
2.6.1. Initialization of the MMC .................................................................. 30
2.6.2. A Command and its Command Response .......................................... 31
2.6.3. Multiple Block Write with the Dynamic CLK_MMC ........................ 33
2.6.4. To Switch to Multiple Block Read Procedure from Multiple Block
Write Procedure ............................................................................................ 35
2.6.5. Multiple Block Read Procedure ......................................................... 36
2.6.6. Verification Using Recorded Physiological Data and a Data-logger
Configuration ............................................................................................... 37
Chapter 3 FRONT-END AMPLIFIER .................................................................... 39
3.1. Introduction ................................................................................................. 39
3.2. Research Purpose ........................................................................................ 39
3.3. Preamplifier Design and Implementation ................................................. 40
3.3.1. I/O Definition ..................................................................................... 40
3.3.2. Circuits ............................................................................................... 41
3.4. Simulation Result ........................................................................................ 47
3.4.1. Input Pre-amplifier ............................................................................. 47
3.4.2. The Whole Amplifier ......................................................................... 51
3.5. Measurement ............................................................................................... 52
3.5.1. Input Pre-amplifier ............................................................................. 52
3.5.2. The Whole Amplifier ......................................................................... 56
3.5.3. Die Photo of the Front-end Amplifier ................................................ 56
3.5.4. Specification ...................................................................................... 59
Chapter 4 CONCLUSION AND FUTURE WORKS ............................................. 60
4.1. Conclusion ................................................................................................... 60
4.2. Future work ................................................................................................. 61
Reference .................................................................................................................... 63
Appendix A1 THE MAIN FLOW CHART OF THE MMC CONTROLLER ..... 65
Appendix A2 THE FLOW CHART OF THE MULTIPLE BLOCK WRITE ........ 66
Appendix A3 THE FLOW CHART OF THE MULTIPLE BLOCK READ .......... 67
Appendix B1 THE SIMULATION RESULT OF TRANSCONDUCTANCE OF
INPUT AMPLIFIER ................................................................................................. 68
Appendix B2 THE MEASUREMENT RESULT OF TRANSCONDUCTANCE
OF INPUT AMPLIFIER ........................................................................................... 69
Appendix C MEASUREMENT RESULT OF THE CMFB OF INPUT
AMPLIFIER ............................................................................................................... 70
參考文獻 References
[1] SD Association, http://www.sdcard.org/home
[2] SD Association, “SD Specifications Part 1 Physical Layer Simplified Specification version 2.00” available: http://www.sdcard.org/developers/tech/sdcard/pls/
[3] CompactFlash Association, http://www.compactflash.org/
[4] CompactFlash Association, “CF+ and CompactFlash Specification Revision 4.1” available: http://www.compactflash.org/spec_download.htm
[5] Memory Stick Developers Site, https://www.memorystick.org/eng/e-index.html
[6] Memory Stick Developers Site, “Memory Stick PRO Specification Summary - Non-Licensee version -”, “Memory Stick PRO IO Expansion Host Specification Summary - Non-Licensee version -”, “Specification Summary - Non-Licensee version -” available: https://www.memorystick.org/eng/simplefmt/index.html
[7] MULTIMEDIACARD ASSOCIATION, http://www.mmca.org/
[8] JEDEC, http://www.jedec.org/default.cfm
[9] JEDEC, “Embedded MultiMediaCard (eMMC) eMMC/Card Product Standard, High Capacity, including Reliable Write, Boot, and Sleep Modes (MMCA, 4.3)”
available: http://www.jedec.org/download/default.cfm System Specification v4.3 (JEDSD84-A43.pdf)
[10] SanDisk, "MultiMediaCard Product Manual Rev. 5.2" available: http://elinux.org/upload/d/d3/Mmc_spec.pdf
[11] National Semiconductor, ADC0832 - 8-Bit Serial I/O A/D Converter with Multiplexer Option, datasheet
available: http://www.national.com/mpf/DC/ADC0832.html
[12] R. J. Baker, CMOS: Circuit Design, Layout, and Simulation, John Wiley and Sons, 2nd ed., pp. 302-304, 2004. ISBN 0-471-70055-X.
[13] R. Rieger, J. Taylor, A. Demosthenous, N. Donaldson, and P. J. Langlois, "Design of a low-noise preamplifier for nerve cuff electrode recording," IEEE Journal of Solid State Circuits, vol. 38, pp. 1373-1379, 2003.
[14] P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, Oxford University Press, 2nd ed., pp. 408-411, 2002.
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