論文使用權限 Thesis access permission:自定論文開放時間 user define
開放時間 Available:
校內 Campus: 已公開 available
校外 Off-campus: 已公開 available
論文名稱 Title |
設計與評估一可變增益及低雜訊的生醫放大器 Design and evaluation of an integrated variable gain, low noise amplifier for medical application |
||
系所名稱 Department |
|||
畢業學年期 Year, semester |
語文別 Language |
||
學位類別 Degree |
頁數 Number of pages |
64 |
|
研究生 Author |
|||
指導教授 Advisor |
|||
召集委員 Convenor |
|||
口試委員 Advisory Committee |
|||
口試日期 Date of Exam |
2011-07-28 |
繳交日期 Date of Submission |
2011-08-22 |
關鍵字 Keywords |
低功率、可調式增益、切換式電容放大器、ASIC、生醫晶片 low power, adjustable gain, switched-capacitor, ASIC, medical chip |
||
統計 Statistics |
本論文已被瀏覽 5648 次,被下載 367 次 The thesis/dissertation has been browsed 5648 times, has been downloaded 367 times. |
中文摘要 |
由於醫療技術的發達,社會朝向高齡化發展,以往醫院的大型診療器具也轉變為小型的家庭看護。可量測心電圖及血壓計等的裝置也朝向微小化和低功率邁進,穿戴式及植入式的微小晶片更是生醫晶片的主流。為了截取心電圖或神經訊號圖,在這論文中提供了一可調式增益的切換式電容放大器,稱作ASIC。 此電路由OTA stage、integrator、sample-and-hold circuit 及 buffer stage組成。在第一級中採用了BJT transistors來取代傳統的MOS transistors來降低在低頻時flicker noise,而可調式系統則主要靠二個外部的數位訊號來控制, 而此訊號採用PIC18F2520來產生。依據這二個特點便構成了一個低輸入雜訊、可調式增益的生醫放大器,且在此ASIC只用 ±0.9 V來當工作電壓再配上小面積更可適用於可戴式或植入式的生醫應用 |
Abstract |
Acquisition of bio-signals is an important feature in advanced medical applications. In order to record bio-signals such as electrocardiogram (ECG) or electromyogram (EMG), a switched-capacitor amplifier with variable linear gain and low noise front-end is discussed in this thesis. The circuit is designed and implemented as an Application-Specific Integrated Circuit (ASIC). This ASIC consists of transconductance stage with custom-designed lateral bipolar transistors in the input stage, switched-capacitor integrating stage, sample-and-hold circuit and buffer output stage. Lateral bipolar transistors were chosen with the intention of reducing flicker noise compared to using MOS input devices. Using a switched-capacitor (SC) stage the gain is adjustable to accommodate input signals of different amplitude making it useful for the recording of different biomedical signals. Adjustable gain is achieved by varying the clock phase delay between two digital control signals which were generated by a microcontroller. Also, small size and low supply voltage operation (±0.9 V) are achieved. Therefore, this ASIC may be used in wearable or even with implantable medical applications. Measured results for test chips realized in TSMC 0.35 μm CMOS technology are reported confirming the correct operation of the circuit. |
目次 Table of Contents |
摘要 .......................................................................................................... i Abstract ................................................................................................... ii Contents ................................................................................................. iii List of Figures ......................................................................................... vi List of Table ..........................................................................................viii Chapter 1 ................................................................................................. 1 Introduction ............................................................................................. 1 1.1. Motivation .................................................................................. 1 1.2. Organization ............................................................................... 4 Chapter 2 ................................................................................................. 5 Circuit operating principle ....................................................................... 5 2.1. Introduction ................................................................................ 5 Chapter 3 ................................................................................................. 9 Switched-capacitor amplifier (version 1) ................................................. 9 3.1. Introduction ................................................................................ 9 3.2. Bias block................................................................................. 11 3.3. Transconductance input stage (OTA) ........................................ 11 iv 3.4. Current integrator stage ............................................................ 13 3.5. Sample-and-hold circuit (S&H) ................................................ 14 3.6. Buffer stage .............................................................................. 15 3.7. Circuit and test board implementation ...................................... 16 Chapter 4 ............................................................................................... 18 Switched-capacitor amplifier (version 2) ............................................... 18 4.1. Introduction .............................................................................. 18 4.2. Bias block................................................................................. 20 4.3. Transconductance input stage (OTA) ........................................ 20 4.4. Current integrator stage ............................................................ 21 4.5. Sample-and-hold circuit (S&H) ................................................ 22 4.6. Buffer stage .............................................................................. 23 4.7. Microcontroller ........................................................................ 24 Chapter 5 ............................................................................................... 26 Simulation results .................................................................................. 26 5.1. Transconductance input stage (OTA) ........................................ 26 5.2. Current integrator stage ............................................................ 28 5.3. Sample-and-hold circuit (S&H) ................................................ 29 5.4. Buffer stage .............................................................................. 30 v 5.5. System simulation .................................................................... 31 Chapter 6 ............................................................................................... 33 Measured results .................................................................................... 33 6.1. Chip measurement .................................................................... 33 6.2. Bio-signal recording application ............................................... 42 Chapter 7 ............................................................................................... 46 Conclusions and future work.................................................................. 46 7.1. Conclusions .............................................................................. 46 7.2. Future works ............................................................................ 47 Reference ............................................................................................... 48 Appendix ................................................................................................ A |
參考文獻 References |
[1]R. Rieger, M. Schuettler, D. Pal, C. Clarke, et al. ,"Very low-noise ENG amplifier system using CMOS technology," IEEE Trans. Neural Systems and Rehab. Eng., vol. 14, no. 4, pp. 427-437, 2006. [2]M. Haugland, and J. Hoffer, "Slip information obtained from the cutaneous electroneurogram: Application in closed loop control of functional electrical stimulation." IEEE Trans. Rehab. Eng., vol 2, pp. 29-36, 1994. [3]M. Haugland, J. Hoffer, and T. Sinkjaer, "Skin contact force information in sensory nerve signals recorded by implanted cuff electrodes." IEEE Trans. Rehab. Eng., vol 2, pp. 18-28, 1994. [4]B. Popovic, R. B. Stein, et al., "Sensory nerve recording for closed-loop control to restore motor functions," IEEE Trans. Biomed. Eng., vol. 40, no. 10, pp. 1024-1031, 1993. [5]R. G. Haahr, S. Duun, E. V. Thomsen, K. Hoppe, and J. Branebjerg, "A Wearable "Electronic Patch" for Wireless Continuous Monitoring of Chronically Diseased Patients," in Proc. 5th Int. Workshop on Wearable and Implantable Body Sensor Networks, 2008, pp. 66-70. [6]D.A Johns, and K. Martin, Analog Integrated Circuit Design, John Wiley & Sons, 1997. [7]R. Rieger, and J. Taylor, A. Demosthenous, N. Donaldson, and P. Langlois, “Design of a low-noise preamplifier for nerve cuff electrode recording,” IEEE J. Solid-State Circuits, vol. 38, no. 8, pp. 1373–1379, Aug. 2003. [8]M. S. J. Steyaert, W. M. C. Sansen, and Z. Chang, “A Micropower Low-Noise Monolithic Instrumentation Amplifier For Medical Purposes,” IEEE J. Solid-State Circuits, vol. SC-22, no. 6, pp. 1163-1168, 1987. [9]R. Rieger, and J. Taylor, "Design Strategies for Multi-Channel Low-Noise Recording Systems," Analog Integrated Circuits & Signal Processing, vol. 58, no. 2, pp. 123-133, 2009. [10]R. Rieger, and Y.-R. Huang, “A High-gain, Low-noise CMOS Amplifier for Sampled Bio-potential Recording,” in Proc. IEEE ISCAS 2010, May-June 2010, pp. 1220 - 1223. [11]X. Zou, X. Xu, L. Yao, and Y. Lian, “A 1-V 450-nW fully integrated programmable biomedical sensor interface chip,” IEEE J. Solid-State Circuits, vol.44, no. 4, pp. 1067–1077, Apr. 2009. [12]M. S. J. Steyaert, W. M. C. Sansen, and Z. Chang, “A micropower low-noise monolithic instrumentation amplifier for medical purposes,” IEEE J. Solid-State Circuits, vol. SC-22, no. 6, pp. 1163–1168, Dec. 1987. [13]M. Mollazadeh, K. Murari, G. Cauwenberghs, and N. Thakor, “Micropower CMOS integrated low-noise amplification, filtering, and digitization of multimodal neuropotentials,” IEEE Trans. Biomed. Circuits Syst., vol. 3, no. 1, pp. 1–10, Feb. 2009. [14]K. A. Ng and P. K. Chan, “A CMOS analog front-end IC for portable EEG/ECG monitoring applications,” IEEE Trans Circuits Syst I, Reg. apers, vol. 52, no. 11, pp. 2335–2347, Nov. 2005. [15]W.-S. Liew, X. Zou, L. Yao, and Y. Lian, “A 1-V 60-μW 16-channel interface chip for implantable neural recording,” in Proc. IEEE Custom Integrated Circuits Conf., 2009, pp. 507–510. [16]R. MacLeod and B. Birchler. ECG Measurement and Analysis [Online]. Available: http://www.cvrti.utah.edu/~macleod/bioen/be6000/labnotes/ecg/descrip.html [17]R. Rieger, “Variable-gain, Low-noise CMOS Amplification for Sampled Front Ends,” IEEE Trans Biomedical circuits & Systems, vol. 5, no. 3, pp. 253-261, Janus. 2011. [18]Y.-R. Huang, “A MMC Controller for Wearable Data Logging and Front-end Amplifier,” M. Eng. Thesis, Dept. Elect. Eng., NSYSU, Kaohsiung, Taiwan, ROC., 2009. [19]R. Rieger and Y.-R. Huang, “A high-gain, low-noise CMOS amplifier for sampled bio-potential recording,” in Proc. ISCAS, Paris, France, May 30–Jun. 2, 2010, pp. 1220–1223. |
電子全文 Fulltext |
本電子全文僅授權使用者為學術研究之目的,進行個人非營利性質之檢索、閱讀、列印。請遵守中華民國著作權法之相關規定,切勿任意重製、散佈、改作、轉貼、播送,以免觸法。 論文使用權限 Thesis access permission:自定論文開放時間 user define 開放時間 Available: 校內 Campus: 已公開 available 校外 Off-campus: 已公開 available |
紙本論文 Printed copies |
紙本論文的公開資訊在102學年度以後相對較為完整。如果需要查詢101學年度以前的紙本論文公開資訊,請聯繫圖資處紙本論文服務櫃台。如有不便之處敬請見諒。 開放時間 available 已公開 available |
QR Code |