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博碩士論文 etd-0822111-204955 詳細資訊
Title page for etd-0822111-204955
論文名稱
Title
設計與評估一可變增益及低雜訊的生醫放大器
Design and evaluation of an integrated variable gain, low noise amplifier for medical application
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
64
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2011-07-28
繳交日期
Date of Submission
2011-08-22
關鍵字
Keywords
低功率、可調式增益、切換式電容放大器、ASIC、生醫晶片
low power, adjustable gain, switched-capacitor, ASIC, medical chip
統計
Statistics
本論文已被瀏覽 5648 次,被下載 367
The thesis/dissertation has been browsed 5648 times, has been downloaded 367 times.
中文摘要
由於醫療技術的發達,社會朝向高齡化發展,以往醫院的大型診療器具也轉變為小型的家庭看護。可量測心電圖及血壓計等的裝置也朝向微小化和低功率邁進,穿戴式及植入式的微小晶片更是生醫晶片的主流。為了截取心電圖或神經訊號圖,在這論文中提供了一可調式增益的切換式電容放大器,稱作ASIC。
此電路由OTA stage、integrator、sample-and-hold circuit 及 buffer stage組成。在第一級中採用了BJT transistors來取代傳統的MOS transistors來降低在低頻時flicker noise,而可調式系統則主要靠二個外部的數位訊號來控制, 而此訊號採用PIC18F2520來產生。依據這二個特點便構成了一個低輸入雜訊、可調式增益的生醫放大器,且在此ASIC只用 ±0.9 V來當工作電壓再配上小面積更可適用於可戴式或植入式的生醫應用
Abstract
Acquisition of bio-signals is an important feature in advanced medical applications. In order to record bio-signals such as electrocardiogram (ECG) or electromyogram (EMG), a switched-capacitor amplifier with variable linear gain and low noise front-end is discussed in this thesis. The circuit is designed and implemented as an Application-Specific Integrated Circuit (ASIC). This ASIC consists of transconductance stage with custom-designed lateral bipolar transistors in the input stage, switched-capacitor integrating stage, sample-and-hold circuit and buffer output stage. Lateral bipolar transistors were chosen with the intention of reducing flicker noise compared to using MOS input devices. Using a switched-capacitor (SC) stage the gain is adjustable to accommodate input signals of different amplitude making it useful for the recording of different biomedical signals. Adjustable gain is achieved by varying the clock phase delay between two digital control signals which were generated by a microcontroller. Also, small size and low supply voltage operation (±0.9 V) are achieved. Therefore, this ASIC may be used in wearable or even with implantable medical applications. Measured results for test chips realized in TSMC 0.35 μm CMOS technology are reported confirming the correct operation of the circuit.
目次 Table of Contents
摘要 .......................................................................................................... i
Abstract ................................................................................................... ii
Contents ................................................................................................. iii
List of Figures ......................................................................................... vi
List of Table ..........................................................................................viii
Chapter 1 ................................................................................................. 1
Introduction ............................................................................................. 1
1.1. Motivation .................................................................................. 1
1.2. Organization ............................................................................... 4
Chapter 2 ................................................................................................. 5
Circuit operating principle ....................................................................... 5
2.1. Introduction ................................................................................ 5
Chapter 3 ................................................................................................. 9
Switched-capacitor amplifier (version 1) ................................................. 9
3.1. Introduction ................................................................................ 9
3.2. Bias block................................................................................. 11
3.3. Transconductance input stage (OTA) ........................................ 11
iv
3.4. Current integrator stage ............................................................ 13
3.5. Sample-and-hold circuit (S&H) ................................................ 14
3.6. Buffer stage .............................................................................. 15
3.7. Circuit and test board implementation ...................................... 16
Chapter 4 ............................................................................................... 18
Switched-capacitor amplifier (version 2) ............................................... 18
4.1. Introduction .............................................................................. 18
4.2. Bias block................................................................................. 20
4.3. Transconductance input stage (OTA) ........................................ 20
4.4. Current integrator stage ............................................................ 21
4.5. Sample-and-hold circuit (S&H) ................................................ 22
4.6. Buffer stage .............................................................................. 23
4.7. Microcontroller ........................................................................ 24
Chapter 5 ............................................................................................... 26
Simulation results .................................................................................. 26
5.1. Transconductance input stage (OTA) ........................................ 26
5.2. Current integrator stage ............................................................ 28
5.3. Sample-and-hold circuit (S&H) ................................................ 29
5.4. Buffer stage .............................................................................. 30
v
5.5. System simulation .................................................................... 31
Chapter 6 ............................................................................................... 33
Measured results .................................................................................... 33
6.1. Chip measurement .................................................................... 33
6.2. Bio-signal recording application ............................................... 42
Chapter 7 ............................................................................................... 46
Conclusions and future work.................................................................. 46
7.1. Conclusions .............................................................................. 46
7.2. Future works ............................................................................ 47
Reference ............................................................................................... 48
Appendix ................................................................................................ A
參考文獻 References
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