最近這幾年來，3D繪圖應用已不再侷限於桌上型電腦或是工作站伺服器，而是漸漸擴展到手持式行動裝置，例如手機、PDAs等等。與桌上型電腦一樣，消費者也希望在行動裝置平台能呈現高畫質的3D畫面，這也是目前面臨極大挑戰。相對於其它平台來說，行動裝置平台由於處理器速度較慢，所以無法處理大量複雜計算的工作。而電池容量也是有限的，所以越複雜的計算工作，我們更需要有一個好的低功率設計方案來省電。另外，雖然行動平台要求的解析度不如桌上型電腦或遊戲平台這麼高，但由於使用者是近距離的使用螢幕，所以在繪圖處理中每個像素點還是都要呈現出來，不然有可能會看到一些缺陷或是鋸齒狀的圖形。
基於上列幾點原因，Mobile平台的效能最佳化與節省能量的方法都是研究的方向，而這些技術都仰賴精確且快速的工作量分析。在我們現有的三維圖形系統晶片架構中，我們參考了許多先前研究者提出的工作量分析方法，有UW1、UW5、PID [8]、Frame Structure [9]、Signature Table [1]、以及不同電源管理策略相互混合的方法[10]。UW1與UW5都是用前面frame的工作量當成目前frame預估的工作量。PID主要是靠回溯迴圈的修正預估工作量。Frame Structure是將每個 frame的組成結構分類，不同類別的工作量可由事先模擬時建表查到，並加總每個類別的工作量當成預估的工作量。Signature table會將一些3D參數存在表裡面，新的frame進來就比對表的值看是否有相符，若有則使用相對應的工作量。我們的設計則是結合UW1與UW5的方法，並訂定一個策略去判斷何時用UW1何時用UW5以得到較佳的效果。最後會比較不同電源管理策略的效果。

The 3D applications, until recently restricted to the desktops and workstations, are expanding into the mobile platforms, such as cellular phones and PDAs. Similar to the desktop, the consumers will expect high-quality 3D experience, and this is a big challenge. Handheld devices have slower processors that are less capable of computing large workloads, and the batteries have limited lifetimes, so for large and complex workload, we need an excellent power management policy for saving power. Besides, although mobile platforms have lower resolution than desktop, each pixel must still be rendered since the screen is closed to the observer’s eye, or we will see some imperfections.
For the reasons above, we make a point of performance optimization and power saving, and these rely on accuracy and fast workload estimation. We refer to some workload estimation methods which researchers have mentioned before, such as UW1, UW5, PID[8], Frame Structure[9], Signature Table[1], and hybrid power management policy[10].UW1 and UW5 both use the previous workload as the estimation workload. PID uses the feedback loop to correct the estimation workload. Frame Structure classifies frames into several structures, and sums the workload of each structure up as the estimation workload. Signature Table stores some 3D parameters in the table, and when a new frame comes in, the 3D parameters of this frame will compare with the table, if match, we use the workload in the table as the estimation workload. Our method is a hybrid policy of UW1 and UW5, and we will decide to use UW1 or UW5 when a new frame comes in. Finally we will compare the performance of each power management policy.

第一章 概論 1
1.1研究動機 1
1.2 論文大綱 2
第二章 研究背景與相關研究 3
2.1 電源管理策略簡介 3
2.2 低功率設計技術簡介 6
第三章 三維圖形系統晶片架構與電源管理方法 9
3.1 三維圖形系統晶片架構 9
3.2 電源管理方法 11
3.2.1 Signature Table 12
3.2.2 Proportional-integral-derivative predictor (PID) 24
3.2.3 History-based predictors 27
第四章 電源管理策略C model 28
4.1 流程 28
4.2 計算不同頻率所需對應的電壓值、功率、時間 29
4.3 電源管理策略與名詞定義 30
第五章 實驗結果與比較 40
5.1 原始3D架構的功率分析 40
5.2 加時脈閘控後的功率消耗比較 44
5.3 UW1_5 硬體實作結果 45
5.4 C model模擬結果 46
5.5 結論 52
第六章 結論 53
REFERENCES 54

[1] B. Mochocki, K. Lahiri, S. Cadambi and X. S. Hu, “Signature-based workload estimation for mobile 3D graphics”, In Design Automation Conference (DAC), 2006.
[2] B. Mochocki, K. Lahiri, and S. Cadambi, “Power Analysis of Mobile 3D Graphics”, In Design, Automation, and Test in Europe (DATE), 2006.
[3] Yan Gu, S. Chakraborty, and Wei Tsang Ooi, “Games are up for DVFS”, In Design Automation Conference (DAC), 2006.
[4] L. Benini, R. Hodgson, and P. Siegel, “System-level Power Estimation And Optimization”, International Symposium on Low Power Electronics and Design,1998.
[5] Yung-Hsiang Lu, G. De Micheli, “comparing system level power management policies”, IEEE Design & Test of Computers, 2001.
[6] L.Benini et al.,”A Survey of Design Techniques for System-Level Dynamic Power Management”, IEEE Trans. VLSI Systems, vol. 8, no. 3, June 2000.
[7] Kihwan Choi, K. Dantu, Wei-Chung Cheng, and M. Pedram, ”Frame-based dynamic voltage and frequency scaling for a MPEG decoder”, IEEE/ACM International Conference on Computer Aided Design, ICCAD 2002.
[8] Yan Gu, Samarjit Chakraborty, ”Control Theory-based DVS for Interactive 3D Games”, Design Automation Conference, 2008.

[9] Yan Gu, Samarjit Chakraborty, ”Power Management of Interactive 3D Games using Frame Structures”, VLSID 2208. 21 st International Conference on VLSI Design, 2008.
[10] Yan Gu, Samarjit Chakraborty, ”A Hybrid DVS Scheme for Interactive 3D Games”, Real-Time and Embedded Technology and Application Symposium, 2008.
[11] Jin-Lin Liu, Kun-Yi Wu, and Shiann-Rong Kuang, ” Low Power Mapping and Pipelined Scheduling Using Tabu Search”, National Computer Symposium, 2007.
[12] M. Claypool, K. Claypool, and F. Damaa, ” The effects of frame rate and resolution on users playing First Person Shooter games”, In Multimedia Computing and Networking Conference(MMCN), 2006.
[13] Q. Wu, P. Juang, M. Martonosi, and D. W. Clark. “ Formal online methods for voltage/frequency control in multiple clock domain microprocessors”, In International Conference on Architectural Support for Programming Languages and Operating Systems(ASPLOS), 2004.
[14] P. Pillai and K. G. Shin. “Real-Time Dynamic Voltage Scaling for Low-Power Embedded Operating Systems”, In Proc. Symp. Operating Systems Principles, pp. 89-102, Oct. 2001.
[15] D.Grunwald. P. Levis, K. Farkas, C. B. Morrey, and M. Neufeld, “Policies for Dynamic Clock Scheduling”, in Proc. Symp. Operating Systems Design and Implementation, pp. 73-86, Oct.2000.