本論文利用磁控濺鍍機（Sputter）鍍製錫摻雜入二氧化矽（Sn：SiO2）薄膜於氮化鈦（TiN）下電極之上，並且濺鍍鉑金（Pt）上電極，製作成金屬/絕緣層/金屬結構的電阻式記憶體。在本論文中利用錫摻入二氧化矽製成的電阻式記憶體（RRAM）元件能連續操作十萬次以上，並且能在85 ℃下保持記憶窗口一萬秒以上。
從實驗室過去的研究知道，超臨界二氧化碳具有修補元件中薄膜缺陷的能力，並且能減少元件漏電流的產生。因此，在本論文中引入超臨界二氧化碳的方式處理Sn：SiO2薄膜。從本論文中的實驗可得知，元件在經過超臨界二氧化碳的方式處理後，在高電阻阻態（HRS）時電流傳輸機制會從普爾-法蘭克（Poole-Frenkel）傳導轉變成蕭基發射（Schottky Emission）；在低電阻阻態（LRS）時電子的傳導會從歐姆傳導（Ohmic Conduction）機制轉變成跳躍傳導（Hopping Conduction）的傳輸機制，降低元件的操作電流。除了利用超臨界二氧化碳處理元件外，在本論文中也利用了一般較常使用的快速熱退火方式處理元件，使得元件的操作電流也能有效降低。
最後，為了要探討Sn：SiO2 RAM中電子如何以跳躍傳導的方式傳輸，我們利用定電流Forming的方式研究電子形成跳躍傳導的過程。實驗中發現，隨著元件限制電流（Compliance Current）的升高，其HRS與LRS的電流也會有上升的趨勢，因此我們推論當元件在形成導通路徑前會先多點成核，並且慢慢聚集成點，最後核點開始體積成長，形成導通路徑。之後利用變溫量測，萃取出不同限制電流操作下的活化能（Ea）與核點間平均距離來驗證我們的推論。

In this study, The bottom electrode（TiN）, middle insulator （Sn：SiO2）, and top electrode （Pt） were deposited respectively by sputtering technique for fabricating the resistive random access memory with metal-insulator-metal structure. Experimental results were indicated that Sn-dopped SiO2 RRAM could be operated over 105 times and retention time was kept stable at thermal stress up to 85 ℃ over 104 s.
In the previous researches, we had known that the supercritical carbon dioxide（SCCO2） fluids could efficiently to passivate the traps in the devices. The leakage current of dielectric film would be reduced significantly after SCCO2 fluids treatment. To improve the dielectric properties of Sn-dopped SiO2 films, the SCCO2 fluids technology was introduced in this study. After SCCO2 fluids treatment, the leakage current of devices was reduced significantly, because the HRS conduction mechanism was transformed from Poole-Frenkel conduction to Schottky emission and the LRS conduction mechanism was transformed from Ohmic conduction to Hopping conduction. Addtionally, RTA treatment was introduced to improve the Sn-dopped SiO2 films. It could also reduce leakage current of devices after RTA treatment. At last, we used constant current forming to find the process of electrons hopping conduction.

論文審定書і
致謝 ii
中文摘要iii
Abstract iv
目錄 v
圖目錄 x
表目錄 xv
第一章 序論 1
1-1 前言 1
1-2 研究目的與動機 1
第二章 文獻回顧 3
2-1 記憶體簡介 3
2-1-1 相變化記憶體(Phas Change RAM， PCRAM) 4
2-1-2 鐵電記憶體(Ferroelectric RAM， FeRAM) 4
2-1-3 磁阻式記憶體(Magnetic RAM， MRAM) 5
2-1-4 電阻式記憶體(Resistance RAM， RRAM) 7
2-2 絕緣體載子傳輸機制 10
2-2-1 穿隧(Tunneling) 11
2-2-2 熱離子發射(Thermionic Emission) 12
2-2-3 普爾-法蘭克發射( Poole-Frenkel Emission ) 13
2-2-4 歐姆傳導(Ohmic Conduction) 15
2-2-5 離子電導(Ionic Conduction) 15
2-2-6 空間電荷限制電流(Space Charge Limit Current， SCLC) 16
2-2-7 跳躍傳導（Hopping Conduction） 16
2-3 超臨界流體簡介 17
第三章 實驗設備與原理 20
3-1 多靶磁控濺鍍系統(Multi-Target Sputter) 20
3-2 三維輪廓儀(Alpha-Step Profilometer） 23
3-3 快速熱退火系統（Rapid Thermal Annealing System， RTA） 23
3-4 半導體精準電性量測系統 24
3-5 傅立葉轉換紅外光譜儀(Fourier-Transform Infrared Spectrometer) 25
3-6 X光光電子能譜儀（X-ray Photoelectron Spectroscopy） 27
第四章 實驗方法與步驟 28
4-1 超臨界二氧化碳處理元件薄膜實驗之流程 28
4-1-1 基板準備 29
4-1-1-1 Si基板的切割與清洗 .29
4-1-1-2 TiN基板 30
4-1-2 Sn：SiO2薄膜的鍍製 31
4-1-3 薄膜厚度量測 32
4-1-4 超臨界二氧化碳處理Sn：SiO2薄膜樣品 32
4-1-5 上電極（Pt）鍍製 34
4-1-6 電性量測分析 36
4-1-7 材料分析 37
4-1-7-1 傅立葉轉換紅外光譜儀 37
4-1-7-1-1 FT Far-IR分析Sn：SiO2薄膜與官能基判定 37
4-1-7-2 X光光電子能譜儀 38
4-2 RTA處理元件薄膜實驗之流程 38
4-2-1 基板準備 39
4-2-1-1 Si基板的切割與清洗 39
4-2-1-2 TiN基板 39
4-2-2 Sn：SiO2薄膜的鍍製 40
4-2-3 薄膜厚度量測 41
4-2-4 上電極（Pt）鍍製 41
4-2-5 RTA真空退火處理 42
4-2-6 電性量測分析 42
4-2-7 材料分析 43
4-2-7-1 FT Mid-IR分析Sn：SiO2薄膜與官能基判定 43
4-2-7-2 X光光電子能譜儀 43
第五章 超臨界二氧化碳處理Sn:SiO2薄膜電阻式記憶體之探討 44
5-1 電性檢測與分析 44
5-1-1 Pt/ SiO2 /TiN元件 44
5-1-2 Pt/ Sn：SiO2 /TiN元件 45
5-1-3 Pt/ Sn：SiO2 /TiN元件(經過超臨界二氧化碳處理後) 49
5-1-4 Pt/ Sn：SiO2 /TiN元件超臨界二氧化碳處理前後LRS之電性探討 55
5-2 薄膜材料分析 60
5-2-1 FT–IR光譜分析 60
5-2-1-1 Sn：SiO2薄膜未經過超臨界二氧化碳處理 60
5-2-1-2 超臨界二氧化碳處理過後之Sn：SiO2薄膜 61
5-2-1-3 Sn：SiO2薄膜超臨界處理前後FT Far-IR 61
5-2-2 X光光電子能譜儀分析 63
5-2-2-1 未經過超臨界二氧化碳處理之Sn：SiO2薄膜 63
5-2-2-2 超臨界二氧化碳處理過後之Sn：SiO2薄膜 .65
5-2-2-3 超臨界二氧化碳處理前後XPS能譜分析 66
5-3 建立超臨界二氧化碳修補薄膜缺陷的模型 68
5-4 章節結論 70
第六章 RTA處理Sn：SiO2電阻式記憶體 72
6-1 電性檢測與分析 72
6-1-1 Pt/ SiO2 /TiN元件 72
6-1-2 微縮後Pt/ Sn：SiO2 /TiN元件 73
6-1-2-1 Pt/ Sn：SiO2 /TiN元件之Endurance測試 78
6-1-2-2 元件Retention測試 79
6-1-3 RTA 200 ℃處理之Pt/ Sn：SiO2 /TiN元件 80
6-1-3-1RTA 200 ℃過後Pt/ Sn：SiO2 /TiN元件之Endurance測試 83
6-1-3-2 RTA 200 ℃過後Pt/SiO2：Sn/TiN元件之Retention測試 84
6-1-4 RTA 200 ℃處理後元件在LRS之電子Hopping活化能萃取 85
6-2 薄膜材料分析 88
6-2-1 FT Mid-IR光譜分析 88
6-2-1-1 未經過RTA 200 ℃處理之Sn：SiO2薄膜 88
6-2-1-2 經過RTA 200 ℃處理之Sn：SiO2薄膜 89
6-2-1-3 RTA 200 ℃處理前後之FT–IR光譜儀分析 89
6-2-2 RTA 200 ℃處理前後Sn：SiO2薄膜X光光電子能譜儀分析 90
6-3 機制與模型 92
6-4 章節結論 94
第七章 利用定電流Forming方式探討電子在LRS的Hopping傳導形成過程 95
7-1 定電流Forming 95
7-2 限制元件On current為10 μA下操作 96
7-3 限制On current為100 μA下操作 99
7-4 限制On current為1 mA下操作 102
7-5 限制On current為10 mA下操作 104
7-6 不同限流的I-V特性比較 107
7-7 提出物理機制與模型 109
7-8 章結結論 112
第八章 結論 113
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