本研究的目標是要設計一個低功率、高速度、具有十位元解析度、每秒兩百五十萬次取樣頻率的數位類比轉換器。為了高速度的應用，這個數位類比轉換器採用溫度計編碼為基礎的分段式數位類比轉換器。同時在設計中使用了最佳化的開關策略。這個開關策略可以補償溫度計編碼數位類比轉換器的矩陣的梯度錯誤。這個數位類比轉換器採用TSMC提供的0.18μm 1P6M mixed-signal CMOS 製程來實作。

The goal of this research is to design a low power, high speed, 10-bit, 250 MHz digital-to-analog converter. For high speed application, the DAC is implemented in thermometer-code based segmented DAC. An optimal switching scheme is used in this design. The switching scheme can compensate the gradient error in thermometer-code DAC arrays.This DAC is implemented in a 0.18μm 1P6M mixed-signal CMOS process provided by TSMC.

Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Thesis Organization 3
Chapter 2 Digital-to-Analog Converter Architecture 4
2.1 Overview 4
2.2 Decoder-Based DAC 6
2.2.1 Resistor String DAC 6
2.2.2 Folded Resistor-String DAC 8
2.2.3 Multiple Resistor-String DAC 9
2.3 Binary-Weighted DAC 10
2.3.1 Binary-Weighted Resistor DAC 10
2.3.2 Reduced-Resistance-Ratio Ladder 12
2.3.3 R-2R-Based DAC 12
2.3.4 Charge-Redistribution Switched-Capacitor DAC 14
2.3.5 Current-Mode DAC 15
2.4 Thermometer-Code DAC 16
2.4.1 Thermometer-Code Current-Mode DAC 18
2.4.2 Segmented DAC 20
2.5 Specifications of D/A Converters 21
2.5.1 DC specifications 21
2.5.2 Dynamic specifications 23
Chapter 3 Circuit Design Techniques of DAC 26
3.1 Overview 26
3.2 Segmented DAC Architecture 26
3.3 Thermometer Decoder 27
3.4 Unit Current Cell 30
3.5 Bandgap References 33
3.6 Biasing Scheme 36
3.7 Switching scheme 37
3.8 Layout implementation 44
Chapter 4 Simulation Result and Testing Setup 47
4.1 Pre-layout Simulation Results 47
4.1.1 Full Code Simulation 47
4.1.2 Settling Time, Rise Time, and Fall Time 49
4.2 Differential Non-Linearity (DNL) 51
4.3 Integral Non-Linearity (INL) 52
4.4 Specification List 53
Chapter 5 Conclusions and Future work 54
5.1 Conclusion 54
5.2 Future Work 54
Reference 55

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