可重新組態運算系統在多媒體應用上已被證實具提昇系統效率
的潛力；而微顆粒可重新組態運算系統乃結合軟硬體共同設計的理念
為低時脈高效能的系統設計主流。本論文針對以運算為導向的微顆粒
可重新組態運算系統設計軟硬體交互處理機制並建立軟體程式與硬
體模組間相互召喚的工作模型，可將軟硬體設計整合在一個程式，將
硬體視為函式一般，有效透過硬體的快速運算來提高系統效率；此交
互處理機制被結合於傳統指令執行管線上，構成可管理微顆粒可重新
組態運算單元的新處理器架構，並提出新的指令支援軟硬體間合作執
行的機制。透過多媒體應用上的演算法如Motion Estimation、DCT 等
程式的驗證，此機制實現最佳化的模型架構，並對軟硬體效率分析與
比較得出效率最佳化的模式。

It has been proofed that Reconfigurable Computing System possesses
the potential to promote system efficiency. Fine-Grain Reconfigurable
Computing System, which integrates the co-design of software and
hardware, is the prevailing current in system designing with low clock
rate and high efficiency. The thesis focuses on computing-oriented
Fine-Grain Reconfigurable Computing System of software-hardware
interwork, and setting up invoking working model for software
program and hardware module as well. The designing of software and
hardware can be integrated into one program, which deals with the
hardware as a function. By quick computing of hardware, it can
promote system efficiency. This interwork mechanism can be
combined into traditional instruction execute pipeline. It composes
manageable Fine-Grain for Reconfigurable Computing System as a
new processor architecture, which brings up new command to support
execution of software-hardware interwork mechanism. The model
architecture is verified by algorithms of multimedia application, such
as Motion Estimation and DCT. In addition, it presents the optimizing
model by analysis and comparison of software and hardware
efficiency.

摘要................................................................2
ABSTRACT............................................................3
第一章 簡介.........................................................6
1-1 可重新組態運算之背景........................................7
1-2 研究動機....................................................8
1-3 研究目的....................................................9
1-4 論文架構...................................................10
第二章 相關研究....................................................11
2-1 可重新組態運算系統之特性...................................11
2-2 可重新組態運算系統之相關研究...............................12
2-3 軟硬體共同執行環境.........................................15
2-4 軟體程序呼叫順序(Procedure Calling Sequence)...............17
第三章 可重新組態運算系統介紹......................................19
3-1 FMRPU 介紹.................................................19
3-2 FMRPU 內部架構元件.........................................20
3-3 FMRPU 的內部連結網絡.......................................28
3-4 將函式運算功能映射於FMRPU .................................30
3-5 可重新組態運算系統元件.....................................32
第四章 軟硬體交互處理機制..........................................33
4-1 軟硬體交互處理機制流程.....................................33
4-2 可重新組態管理單元架構.....................................38
4-3 軟體端新增支援硬體函式呼叫指令.............................43
4-4 硬體函式呼叫執行過程.......................................46
4-5 軟體工具環境...............................................49
4-6 例外處理(Exception Handle).................................50
第五章 系統實現與分析..............................................52
5-1 系統模型與驗證.............................................52
5-2 結果分析...................................................53
第六章 結論與未來方向..............................................60
參考資料...........................................................61

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