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博碩士論文 etd-0901103-203739 詳細資訊
Title page for etd-0901103-203739
論文名稱
Title
AC-3音訊解碼器於ARM-based平台上之軟硬體共同設計
Hardware/Software Co-design of an AC-3 Audio Decoder on an ARM-based Platform
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
60
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2003-07-29
繳交日期
Date of Submission
2003-09-01
關鍵字
Keywords
音訊、軟硬體共同設計
IMDCT, co-design, platform based, AC-3, FFT
統計
Statistics
本論文已被瀏覽 5691 次,被下載 5048
The thesis/dissertation has been browsed 5691 times, has been downloaded 5048 times.
中文摘要
杜比AC-3音訊壓縮格式是現今美規數位電視所採用的音訊壓縮格式,而且也廣泛的被用在DVD影片裡面。在規格中為了改進壓縮品質定義了一個作一次512點(長轉換)的轉換和一個做兩次256(短轉換)點的轉換兩種模式,這兩種轉換模式會視情況的切換。
本研究是一個以ARM-based platform 來設計一個AC-3的解碼器,經過我們模擬的結果,發現decoder中的IMDCT部分佔了整個解碼流程中66%的運算量,而且解碼所需時間並不能達到撥放音訊檔案時的即時性需求,因此,本論文中將會考慮長短轉換切換問題、轉換過程的記憶體配置以及有效的運用查表來減少計算量,設計出一種適用於ARM-based 平台下的AC-3解碼器之IMDCT轉換硬體架構,以HW/SW co-design方式來達到即時性的需求。


Abstract
Dolby AC-3, the audio signal compression standard adopted by the United States Advanced Television System Committee (ATSC), and wildly used in other applications DVD and digital TV. In order to improve the compression quality, the AC-3 defines two block lengths for IMDCT, one 512-pt.(long block) and the other 256-pt.(short block,).
In the thesis, we realize the AC-3 audio decoder on the ARM-based platform. Our simulation results show that the IMDCT takes about 66% computation time of all decode process. Since the pure software decoding time cannot meet the real time requirement in many high speed applications, we design and implement the IMDCT hardware architecture considering of shore/long transform, the memory allocation for IMDCT, and use look-up tables to reduce the computation load. The HW/SW co-design on the ARM-based platform achieves the real-time requirements.


目次 Table of Contents
目錄 I
圖目錄 III
中文摘要 V
ABSTRACT VI
CHAPTER 1 INTRODUCTION 1
1.3.1 聲音訊號在統計上的特性 3
1.3.2 消除不必要的聲音訊號 3
CHAPTER 2 OVERVIEW ON AC-3 6
2.3.1 耦合(coupling) 10
2.3.2 rematrix 11
2.4.1 指數編碼(exponent encoding) 12
2.4.2 位元配置(bit allocation) 13
2.4.3 量化 15
2.4.4 擾動策略(dither) 16
2.4.5 包裝封包 16
CHAPTER 3 PLATFORM-BASED DESIGN與發展平台 17
3.2.1 傳統設計(Traditional design) 19
3.2.2 軟/硬體共同設計(HW/SW Co-design) 20
3.2.3 實作採用之發展平台 21
CHAPTER 4 適用於AC-3之IMDCT架構與實現 22
4.1.1 Forward transform MDCT 24
4.1.2 Inverse transform IMDCT 25
4.2.1 Pre-IFFT 31
4.2.2 IFFT 32
4.2.3 Post-IFFT 34
4.2.4 Compute Pcm and Compute Delay 35
4.4.1 Pre-IFFT 狀態位址產生 37
4.4.2 IFFT狀態位址產生 39
4.4.3 Post-IFFT狀態位址產生 41
4.4.4 Compute Pcm狀態位址產生 41
4.4.5 Compute Delay狀態位址產生 42
4.6 實作數據 45
CHAPTER 5 軟硬體共同設計實作 47
5.2.1 AHB 49
5.2.2 AHB Master & Slave 互動方式 50
5.3.1 硬體方面需作之調整 52
5.3.2 軟體方面需作之調整 53
5.4.1 軟/硬體功能驗證 55
5.4.2 即時性驗證 55
CHAPTER 6 結論 58
參考文獻 59
參考文獻 References
[1] Y. F.Dehery, “MUSICAM Source Coding,” AES 10th International Conference, pp. 71-90.
[2] K. Brandenburg, “ASPEC Coding,” AES 10th International Conference, pp. 81-90.
[3] ISO/IEC J’TCL/SC29. Information technology – coding of moving picture and associated audio for digital storage media up to 1.5Mbps – cd 11172(part3, audio). Doc: ISO/IEC JTCI/SC29 NO71
[4] J. C. McKinney, R. Hopkins, “Digital Audio Compression Sandard (AC-3),” Advanced Television System Committee, 20, Dec. 1995.
[5] Rajsuman and Rochit, “System-on-a-Chip : Design and Test,” Norwood, MA: Artech House, 2000.
[6] M. Keating and P. Bricaud, “Reuse Methodology Manual for System-on-a-Chip Designs,” Boston, MA: Kluwer Academic, 1998.
[7] ARM Integrator/AP User Guide, ARM Corporation, Cambridge UK, 1999.
[8] ARM Integrator/CM7TDMI User Guide, ARM Corporation, Cambridge UK, 1999.
[9] Altera Data Sheet “Excalibur Device Overview,” ver2.0, 2002.
[10] Altera Application Note “System Development Tools For Excalibur Devices,” ver1.0, Jan. 2002.
[11] Altera Application Note “Excalibur Solutions—Embedded Stripe Performance Designs,” ver1.2, Nov. 2002.
[12] Altera Application Note “Excalibur Solutions—Multi-Master Reference Design,” ver2.3, Nov. 2002.
[13] Altera Application Note “Excalibur Solutions - Using the Embedded Stripe Bridges,” ver2.1, Jun. 2002.
[14] Yutai Ma, “An effective memory addressing scheme for FFT processors,” IEEE Transactions on Signal Processing, Volume: 47 Issue: 3 , Mar 1999 pp.907-911
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