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博碩士論文 etd-0901109-024820 詳細資訊
Title page for etd-0901109-024820
論文名稱
Title
應用於三維繪圖系統中OpenGL-ES 2.0 頂點處理器之高效能裁切引擎設計
Design of an Efficient Clipping Engine for OpenGL-ES 2.0 Vertex Shaders in 3D Graphics Systems
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
108
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2009-07-29
繳交日期
Date of Submission
2009-09-01
關鍵字
Keywords
三維繪圖、裁切演算法、頂點處理器
Clipping algorithm, 3D graphics, Vertex Shader, OpenGL-ES
統計
Statistics
本論文已被瀏覽 5712 次,被下載 1660
The thesis/dissertation has been browsed 5712 times, has been downloaded 1660 times.
中文摘要
電腦圖學於三維繪圖的流程中,可分為兩大繪圖處理模組:幾何運算子系統( Geometry System )和著色子系統( Rendering System )。在幾何運算子系統中,包含頂點座標轉換( Transformation )、頂點光源計算(Lighting )、刪除背面元件( Backface-culling )、Outcode 判斷( Pre-clipping )、裁切運算功能( Clipping )。裁切運算功能可將超出可視範圍外的物件作裁切的動作,可有效地提升繪圖流程的效能。而在硬體方面,由於裁切演算法的循序性,加入裁切硬體於幾何運算子系統中往往是設計上的瓶頸。本論文主要實現Dual-path 裁切引擎為支援OpenGL-ES 2.0 規格,置於頂點處理器後方處理三角形的輸出。加入該裁切硬體於幾何運算系統中,可使整體三維繪圖流程減少許多不必要的運算,能讓執行繪圖的過程更有效率。對於裁切硬體中所需求交點的內插運算,本論文利用pipeline 與共用硬體設計的概念,改善求交點硬體的面積與執行效能。對於裁切演算法的設計,本論文中提出兩點輸入/輸出的裁切演算法,讓使用者能依照不同的成本需求,在裁切系統硬體的應用上有更多的選擇。
Abstract
In computer graphics technique, the 3D graphic pipeline flow has two processing modules: Geometry module and Rendering module. The geometry module supports vertex coordinate transformation, vertex lighting computation, backface-culling, pre-clipping, and clipping functions. Clipping module clips the outside part of objects by view volume boundaries. Adding clipping module into geometry module will make 3D graphics pipeline flow more efficiency. Due to the sequential parsing nature of clipping, it causes the challenges to implement clipping function in hardware design. This paper implements a dual-path clipping engine placed after the Vertex Shader in geometry module and supports OpenGL-ES 2.0 specification. With the clipping engine, it reduces the unnecessary operations in 3D graphics pipeline flow and makes the performance efficient. The pipelined and shared hardware design is proposed to improve the area cost and throughput of the interpolation operation in clipping engine. The two vertices in/out clipping method is proposed in this paper. Users have more different choices of clipping algorithms for hardware implementation with respect to the performance and hardware limitation.
目次 Table of Contents
第1 章 概論 1
1.1 本文大綱 1
1.2 研究動機 1
1.3 研究貢獻 3
第2 章 研究背景與相關研究 4
2.1 電腦圖學與OpenGL-ES 簡介 4
2.2 幾何子系統 8
2.2.1 支援運算功能 9
2.2.2 硬體模組架構設計 12
2.3 頂點處理器 14
2.3.1 指令格式設計 15
2.3.2 SIMD 硬體架構設計 17
第3 章 裁切演算法與硬體架構設計 21
3.1 Pre-clipping 演算法 21
3.2 Clipping 演算法 27
3.3 修改版本SH 演算法 (Modified SH Algorithm) 33
3.4 改善修改版本SH 演算法 (Improved Modified SH Algorithm) 37
3.5 兩點輸入/輸出裁切演算法 (Proposed Clipping Algorithm) 39
第4 章 於頂點處理器中支援裁切功能 48
4.1 使用指令集格式 48
4.2 所支援運算功能 49
4.3 使用之硬體架構 50
4.4 以頂點處理器支援裁切功能 52
第5 章 於額外硬體設計支援裁切功能 56
5.1 裁切系統硬體架構 56
5.2 運算單元硬體設計 62
5.2.1 浮點數與定點數運算單元 62
5.2.2 設計運算架構與效能分析 69
第6 章 系統比較與驗證 79
6.1 系統比較 79
6.2 系統驗證 82
第7 章 結論與未來目標 84
7.1 結論 84
7.2 未來目標 85
附錄A 裁切演算法效能比較分析 86
附錄B 於頂點處理器執行裁切功能指令設計 92
參考文獻 94
參考文獻 References
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