本篇論文展示一個OpenGL ES 2.0程式編譯器的開發，該編譯器產生新穎圖形處理器的指令。此論文是一個大型計畫的一部分，該計畫目的為開發嵌入式系統低功率圖形處理器。
我們的編譯器開發使用LLVM為基礎並著重三個編譯器領域進行討論：（1）修正並增進編譯器前端 (front-end, shading language parser) 效率。（2）新增LLVM bitcode格式以支援shading language的資訊。（3）修改LLVM編譯器後端以支援新增的bitcode。主要的工作是支援OpenGL的GLSL shading language中的矩陣和向量資料型態。
　　結合本文中提及的其他論文後，將完成一個針對我們新型圖形處理器的可運行、基礎GLSL編譯器。在未來的研究，將探討如何使該編譯器最佳化和健全。

This thesis describes the development of a compiler for OpenGLES 2.0 programs for a novel GPU. This work is a part of a larger project to develop a low-power GPU for embedded systems.
Our compiler has been developed in the LLVM compiler infrastructure. The present thesis focuses on three areas of the compiler: 1) making corrections and improvements to an existing graphics shading language parser, 2) augmenting LLVM’s bit-code format to support the new information from the shading language, and 3) modifying LLVM’s backend to support this augmented bit-code. Much of this work is related to supporting the matrix and vector primitive data types found in OpenGL’s GLSL shading language.
In conjunction with several other theses, as listed in the text, this work achieves a working basic compiler for GLSL code on our new GPU. Continuing work by future researchers is necessary to make the compiler more robust and optimized.

1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2. Platform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 OpenGL ES Shading Language . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Our Novel GPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 The LLVM Compiler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3.1 The LLVM Front-end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3.2 The Augmented LLVM IR Format . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3.3 The LLVM Back-end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3. Related Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1 Co-developed Aspects of the Compiler . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2 Related Algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4. Compiler Development . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1 Correcting the Imperfections of the GLSL Parser [5] . . . . . . . . . . . . . . 19
4.2 The LLVM Parser . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.3 Modifications to the Back-end for Vectors . . . . . . . . . . . . . . . . . . . . . 23
4.3.1 Mapping the LLVM IR to Assembly Code . . . . . . . . . . . . . . . . . . . . 25
4.3.2 Combining the Scalar and Vector Register Sets . . . . . . . . . . . . . . . . . 27
5. Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6. Conclusions and Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

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