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論文名稱 Title |
對新圖形處理器的編譯器/硬體協同設計及記憶體管理 Compiler/Hardware Codesign and Memory Management for a Novel 3D Graphics Processor |
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系所名稱 Department |
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畢業學年期 Year, semester |
語文別 Language |
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學位類別 Degree |
頁數 Number of pages |
103 |
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研究生 Author |
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指導教授 Advisor |
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召集委員 Convenor |
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口試委員 Advisory Committee |
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口試日期 Date of Exam |
2010-06-28 |
繳交日期 Date of Submission |
2010-09-08 |
關鍵字 Keywords |
連結器、組譯器 Linker, Assembler, OpenGL Shading Language |
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統計 Statistics |
本論文已被瀏覽 5654 次,被下載 0 次 The thesis/dissertation has been browsed 5654 times, has been downloaded 0 times. |
中文摘要 |
這篇論文是個大型、由多個實驗室為了嵌入式系統開發的圖形處理器晶片系統之計畫的一部分,為了支援這個系統,這篇論文講述這個系統的組譯器及連結器。這些為了計畫被開發出來的工具是”草稿”,因為輸入(給組譯器)或(從連結器)輸出都根據我們新穎的圖形處理器而有新的格式。 記憶體管理是這篇論文中一個有挑戰性的工作,另一個則是決定組合語言的格式,但是最大的挑戰還是協同設計。組譯器必須跟正在開發的編譯器一起工作,機器指令必須支援圖形處理器硬體的格式及功能性,硬體的一些特別的細節必須嚴格的去討論與協商,記憶體位址也需要與需要使用記憶體位置的標準檢查程式開發小組協同設計。 |
Abstract |
This thesis is part of a large, multi-laboratory project to develop a GPU system-on-chip (SoC) for embedded systems. In support of this project, this current thesis presents the assembler and linker for the overall system. These tools were developed “from scratch” for this project, because the both the input (to our assembler) and the output (from our linker) have new formats, due to the novelty of our GPU. One of the challenges of the work in this thesis is the problem of memory management. Another is the problem of deciding upon an assembly format. But the largest challenge was in co-design. The assembler has to work with a compiler which is also under development by other students. Also, the machine instructions that we produce have to support the format and functionality of the GPU hardware. To accomplish this, the specific details of this hardware had to be rigorously defined through discussion and negotiation. Furthermore, the memory addresses also required codesign with the benchmark development team, which needs to have access to these memory locations. So codesign issues impacted many of the features of this thesis. |
目次 Table of Contents |
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 Codesign challenges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 A novel GPU for embedded systems . . . . . . . . . . . . . . . . . . . . . . . 2 1.3 Providing support for OpenGLES 2.0 benchmarks . . . . . . . . . . . . 5 1.4 Making the assembler and linker work with our compiler . . . . . . . . . 9 2. Related work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.1 “Compiling to VLIW Fragment Pipeline” [4] . . . . . . . . . . . . . . . . . 11 2.2 “LLVM for OpenGL and Other Stuff” [6] . . . . . . . . . . . . . . .. . . . . . 11 2.3 Efficient Partitioning of Fragment Shaders for Multipass Rendering on Programmable Graphics Hardware. [9] . . . . . . . . . . . 13 3. The Assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.1 Codesign issues in the assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.2 The assembly format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4. The Linker (GPU Memory Management) . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 Resolving variable addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.2 Implementing GLSL instrinsic functions . . . . . . . . . . . . . . . . . . . . . 21 5. Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 Codesign documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 Output files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . 24 5.3 Simulation results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6. Conclusions and future work . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . 29 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Appendix A. Excel file of machine code format . . . . . . . . . . . . . . . . . . . . . 31 Appendix B. Assembly language programmer’s guide . . . . . . . . . . . . . . . . 36 |
參考文獻 References |
[1] Robert J. Simpson. The OpenGL ES Shading Language, Language Version 1.00, Document Revision 17. Website: http://www.khronos.org/registry/gles/specs/2.0/GLSL_ES_Specification_1.0.17.pdf [2] R. J. Rost. OpenGL Shading Language, Second Edition. Reading, MA, USA: Addison-Wesley, 2006. [3] Aaftab Munshi and Jon Leech. OpenGL ES Common Profile Specification Version 2.0.24. Website: http://www.khronos.org/registry/gles/specs/2.0/es_full_spec_2.0.24.pdf [4] W. Mark and K. Proudfoot. “Compiling to a VLIW Fragment Pipeline.” Proc. of SIGGRAPH/Eurographics Workshop on Graphics Hardware, Los Angeles California. July 2001. [5] NVIDIA Corporation. NVIDIA OpenGL Extension Specifications, March 2001. [6] Chris Lattner. “LLVM for OpenGL and other stuff.” LLVM Designers Conference, May 2007. [7] J. Nickolls, I. Buck, M. Garland, and K. Skadron. “Scalable Parallel Programming with CUDA,” GPU Computing, Volume 6, Issue 2, March/April 2008, pp. 40-53. [8] LLVM Language Reference Manual. Website: http://llvm.org/docs/LangRef.html [9] Eric Chan,Ren Ng,Pradeep Sen,Kekoa,Proudfoot, and Pat Hanrahan. “Efficient Partitioning of Fragment Shaders for Multipass Rendering on Programmable Graphics Hardware,” Proceedings of the ACM SIGGRAPH/ EUROGRAPHICS Conference on Graphics Hardware, 2002. [10] A. Aho, M. Lam, R. Sethi and J. Ullman, “Compilers: Principles, Techniques and Tools(2nd Ed)”, Pearson Addison Wesley, Hong Kong, 2006. |
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