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博碩士論文 etd-0910102-172323 詳細資訊
Title page for etd-0910102-172323
論文名稱
Title
適用於低功率低成本資訊家電之16-bit微處理器
An Embedded 16-bit Low Power and Low Cost Microprocessor in Information Appliance
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
55
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2002-07-30
繳交日期
Date of Submission
2002-09-10
關鍵字
Keywords
16 位元、資訊家電、微處理器、低成本
thumb instruction set, microprocessor, high code density, low cost
統計
Statistics
本論文已被瀏覽 5680 次,被下載 2
The thesis/dissertation has been browsed 5680 times, has been downloaded 2 times.
中文摘要
在嵌入式系統中,由於系統資源的有限,因此,“小”成為嵌入式系統的特色。本篇論文研究的貢獻在於藉由原本所設計的32-bit RISC CPU based on ARM4vT Instruction Set,直接削減成16-bit RISC CPU based on Thumb Instruction Set,以達到快速設計、time-to-market的要求。並且,透過programming model的建立,以達到節省開發compiler及Assembler的設計時間,以保持其軟體環境的完整度。
Abstract
In embedded system, the system resource is limited. So, small is the most important feature of the embedded system. In this thesis, we propose a fast way to design a 16-bit microprocessor through reducing the 32-bit RISC CPU based on ARM 4vT Instruction set to the 16-bit RISC Thumb microprocessor. And through building the programming model, we can reach to save the design time of developing the compiler and assembler to keep its software environment.
目次 Table of Contents
目錄
1. MOTIVATION 6
1.1 研究動機 6
1.2 研究方法 6
1.3 研究貢獻 7
2. RELATED WORK 8
2.1 SUPER-H 8
2.2 ARM7TDMI 12
2.3 SE16108 14
3. SYS16TM HARDWARE ARCHITECTURE 17
3.1 BENCHMARK ANALYSIS 17
3.2 INSTRUCTION SET 19
3.3 ARCHITECTURE ANALYSIS 21
3.4 MICRO-ARCHITECTURE 22
3.4.1 管線式(Pipeline)架構 22
3.4.2 指令提取階段(Fetch Stage) 23
3.4.3 指令解碼階段(Decode Stage) 24
3.4.4 指令執行階段(Execute Stage) 27
3.5 ADDRESSING EXPANSION 29
3.6 SPECIFIED THUMB CONTROL UNIT 31
3.7 SINGLE MODE REGISTER FILE 32
3.8 EXCEPTION 34
4. SYS16TM SOFTWARE ENVIRONMENT 39
4.1 PROGRAMMING MODEL 39
4.2 FIRMWARE 41
4.3 EXCEPTION SERVICE 41
4.4 REUSE ARM’S SOFTWARE ENVIRONMENT 42
5. SYS16TM VERIFICATION ENVIRONMENT 45
5.1 VERIFICATION STRATEGY 45
5.2 SYSTEM FUNCTIONAL VERIFICATION 46
5.3 AUTOMATIC VERIFICATION ENVIRONMENT 46
5.4 CODE COVERAGE 49
6. PERFORMANCE, COST, POWER ANALYSIS 50
6.1 SYNTHESIS RESULT 50
6.2 CRITICAL PATH ANALYSIS 50
6.2.1 針對Decode Stage critical path的分析比較 50
6.2.2 針對Execute Stage critical path的分析比較 51
6.3 CRITICAL PATH OPTIMIZATION 52
6.4 PERFORMANCE & COST COMPARISON 52
6.5 FPGA IMPLEMENTATION 52
7. CONCLUSION 54
8. FUTURE WORK 55
參考文獻 References
9. Reference
[1] Manfred Schlett, “Trends in Embedded-Microprocessor Design” IEEE Computer, 1998, August
[2] Michael Keating and Pierre Bricaud, Reuse Methodology Manual for System-on-a-Chip Designs, 2nd Edition, KLUWER ACADEMIC PUBLISHERS.
[3] Atsushi Hasegawa,”SH3: High Code Density, Low Power” IEEE Micro, 1995.
[4] 丁邦安, “嵌入式微處理器核芯應用系列(二)ARM核芯簡介” IC Design, 2001, February
[5] Simon Segars, “Thumb: Reducing the Cost of 32-bit RISC Performance in Portable and Consumer Applications” IEEE Proceedings of COMPCON’96
[6] Young-Ho Cha, “An Embedded 16 bit Microprocessor” the second IEEE Asia Pacific Conference on ASIC, 2000
[7] ARM7TDMI Data Sheet ,ARM Ltd, 1995
[8] 賴奇劭, ARM7微處理器之衍生架構 國立中山大學資訊工程研究所, 2001
[9] Michael John Sebastian Smith, Application-Specific Integrated Circuit , Addison Wesley Longman Publishers, INC.
[10] PIC16C63A/65B/73B/74B Data Sheet ,Microchip Technology INC, 2000
[11] David A. Patterson and John L. Hennessy, Computer Origanization & Design – The Hardware/Software Interface 2nd Edition, Margan Kaufmann Publishers, Inc.
[12] John L. Hennessy and David A. Patterson, Computer Architecture A Quantitative Approach 2nd Edition, Margan Kaufmann Publishers, Inc.
[13] Simon Segars and Keith Clarke and Liam Goudge, “Embedded Control Problem, Thumb, and the ARM7TDMI”, IEEE Micro, 1995
[14] Piguet, C. et al., “Low-Power Design of 8-b Embedded CoolRisc Microcontroller Cores”, IEEE Journal of solid-state circuits, July 1997
[15] Simon Segar, “The ARM9 Family – High Performance Microprocessors for Embedded Applications” IEEE International Conference on Computer Design 1999 (ICCD’99).
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