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博碩士論文 etd-0911112-120201 詳細資訊
Title page for etd-0911112-120201
論文名稱
Title
使用動態規劃法之立體視差估算硬體設計
Hardware Design for Disparity Estimation Using Dynamic Programming
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
75
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2012-07-24
繳交日期
Date of Submission
2012-09-11
關鍵字
Keywords
立體視覺、視差向量、動態規劃、立體匹配、深度圖
depth map, disparity, stereo vision, dynamic programming, stereo correspondence, stereo matching
統計
Statistics
本論文已被瀏覽 5731 次,被下載 779
The thesis/dissertation has been browsed 5731 times, has been downloaded 779 times.
中文摘要
近年來,立體視覺技術(Stereo Vision)被廣泛的應用於各種應用領域,而深度圖(Depth Map)是產生立體視覺的重要資訊。一般而言,深度圖可由兩張影像經過立體匹配(Stereo Matching)所產生的視差(Disparity)求得,但是藉由立體匹配產生深度圖的計算複雜度高,因此若僅以軟體來實現,往往無法達到即時性的要求。本論文提出一個可達到即時性產生深度圖的立體視覺硬體架構,加速立體匹配產生影像深度資訊的運算。透過輸入兩張左右眼影像後,利用全域性搜尋的動態規劃演算法(Dynamic Programming, DP)來尋找相對的視差向量之步驟中,硬體複雜度較高的三部分為匹配代價計算(Matching Cost Computation, M.C.C.)、最小累計代價(Minimum Cost Accumulation, M.C.A.)與視差值最佳化(Disparity Optimization, D.O.)。本論文探討在M.C.C.模組與M.C.A.模組,拿取左右眼影像進行運算的順序性對硬體成本的影響。另外D.O.模組使用兩種做法實現,一種為Systolic-Like架構,可使硬體模組化、規則化,另一種為使用記憶體來降低硬體成本。由實驗結果得知,本論文最終提出的架構設計配合管線化(Pipeline)與使用記憶體實現D.O.模組,可節省大量的硬體成本並提升連續影像序列之資料運算速度。
Abstract
Recently, stereo vision has been widely used in many applications, and depth map is important information in stereo vision. In general, depth map can be generated from the disparity using stereo matching based on two input images of different viewing positions. Due to the large computation complexity, software implementation of stereo matching usually cannot achieve real-time computation speed. In this thesis, we propose hardware implementations of stereo matching to speed up the generation of depth map. The proposed design uses a global optimization method, called dynamic programming, to find the disparity based on two input images: left image and right image. It consists of three main processing steps: matching cost computation (M.C.C.), minimum cost accumulation (M.C.A.), and disparity optimization (D.O.). The thesis examines the impact of different pixel operation orders in M.C.C and M.C.A modules on the cost of hardware. In the design of D.O. module, we use two different approaches. One is a Systolic-Like structure with streaming processing, and the other is memory-based design with low hardware cost. The final architecture with pipelining and memory-based D.O. can save a lot of hardware cost and achieve high throughput rate for processing a sequence of image pairs.
目次 Table of Contents
中文論文審定書 i
英文論文審定書 ii
中文摘要 iv
Abstract v
致謝 vi
第1章 概論 1
1.1 研究背景 1
1.1.1 立體視覺成因 1
1.1.2 極線幾何與極線幾何限制 3
1.1.3 立體顯示技術 4
1.2 研究動機 9
1.3 本文大綱 9
第2章 相關研究 11
2.1 匹配代價計算(Matching Cost Computation) 11
2.2 代價函數聚合(Cost Aggregation) 13
2.3 視差計算(Disparity Computation) 15
2.3.1 區域性演算法 15
2.3.2 全域性演算法 16
2.4 視差修正(Disparity Refinement) 18
第3章 研究方法及硬體架構設計與實現 21
3.1 參數定義 21
3.2 系統架構 21
3.2.1 彩色影像轉亮度影像(RGB to Intensity) 22
3.2.2 匹配代價計算(Matching Cost Computation) 23
3.2.3 最小累計代價(Minimum Cost Accumulation) 24
3.2.4 視差值最佳化(Disparity Optimization) 26
3.2.5 深度圖轉換(Depth Map Conversion) 27
3.3 硬體架構設計第一版 28
3.3.1 彩色影像轉亮度影像(RGB to Intensity) 28
3.3.2 匹配代價計算(Matching Cost Computation) 29
3.3.3 最小累計代價(Minimum Cost Accumulation) 31
3.3.4 視差值最佳化(Disparity Optimization) 34
3.4 硬體架構設計第二版(管線化) 37
3.5 硬體架構設計第三版(面積最佳化) 38
3.4.1 匹配代價計算(Matching Cost Computation) 41
3.4.2 最小累計代價(Minimum Cost Accumulation) 43
3.4.3 視差值最佳化(Disparity Optimization) 45
第4章 實驗結果分析與比較 47
4.1 週期數分析 47
4.2 邏輯合成數據與分析 48
4.3 軟硬體驗證 50
4.4 測試影像 54
第5章 結論與未來展望 57
5.1 結論 57
5.2 未來展望 57
參考文獻 (References) 59
參考文獻 References
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