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博碩士論文 etd-0913116-111333 詳細資訊
Title page for etd-0913116-111333
論文名稱
Title
以CMOS標準製程製作之橫向雙極性電晶體的改善與表述
Characterization of Lateral Bipolar Transistor in 180nm and 350nm CMOS for a Biosignal Acquisition Stage
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
98
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2016-10-06
繳交日期
Date of Submission
2016-10-13
關鍵字
Keywords
ASIC、閃爍雜訊、低雜訊、生醫訊號、橫向雙極性電晶體
ASIC, Low noise, Biomedical signal, Flicker noise, Lateral Bipolar Transistor
統計
Statistics
本論文已被瀏覽 5744 次,被下載 823
The thesis/dissertation has been browsed 5744 times, has been downloaded 823 times.
中文摘要
隨著醫療技術的發達與積體電路製程技術的進步,生醫訊號處理的技術與應用也越來越來熱門,為此,用來擷取生醫訊號(如:心電圖、肌電圖)的訊號輸入級也變得重要。由於生醫訊號的振幅只有幾豪伏特或更小,也讓訊號極容易受到雜訊的干擾,如不能有效抑制雜訊,系統將無法精確的放大生醫訊號並獲得合適的電壓輸出,因此本論文將著重在探討與比較使用何種雙極性電晶體(Bipolar Junction Transistor)當作訊號輸入級能有效抑制雜訊。
本論文主要實現以CMOS製程製作之橫向雙極性電晶體(Lateral Bipolar Junction Transistor),藉由TSMC 0.35μm 及 0.18μm 製程之下製作出四種不同布局形式(Layout)的橫向雙極性電晶體,同時也製作各式量測數據之PCB(Printed circuit board),對橫向雙極性電晶體在低頻的特性加以量測,包含轉導值(Transconductance)、輸入阻抗(Input resistance) 、電流增益(Current gain) 、啟動電壓(Turn-on voltage) 、電壓偏移(Offset)以及閃爍雜訊(Flicker noise) ,並將其中一種形式應用於製作生醫訊號放大器之訊號輸入級,依據量測結果得證本論文中實現之橫向雙極性電晶體可降低電路工作在低頻時的閃爍雜訊(Flicker noise)以擷取較完整之訊號,亦可應用於低功率電路(Low-power circuit),最後將量測結果做各式比較及討論。
Abstract
Technologies and applications of biomedical signals processing become increasingly popular as integrated circuit fabrication technology and process advances, a low interference input stage in a recording circuit is very important for recording bio-signals such as electrocardiogram (ECG) and electromyogram (EMG) while the amplitude is only few millivolts or less. If the circuit cannot reject noise effectively, it is hard to amplify the bio-signal and obtain the output voltage of the recording system accurately. This thesis is focused on the measurement of several candidates of bipolar devices to be used in a differential input stage. We characterize lateral bipolar transistors in TSMC 180nm and 350nm CMOS technologies. We realized four different layout types of lateral BJT in TSMC D35 CMOS process and one type in TSMC T18 CMOS process for testing. Devices fabricated in conventional multi-project wafer runs have been measured to determine their low-frequency parameters, including transconductance, input resistance, current gain, turn-on voltage, offset and noise. It is observed that all the BJTs examined to provide a very low flicker-noise corner. The results further show that circular designs do not provide the significant advantage over using the simpler square layout. The metal may be used to cover the base area instead of using polysilicon without significantly affecting the device performance.
目次 Table of Contents
審定書 i
致謝 ii
摘要 iii
Abstract iv
Contents v
List of Figures vii
List of Tables xii
Chapter 1 1
1.1 Background and motivation 1
1.2 Thesis contributions 3
1.3 Thesis organization 3
Chapter 2 4
2.1 Bipolar Junction Transistor Introduction 4
2.2 Equivalent Circuit and Small Signal Model of PNP BJT 8
2.2.1 Ebers - Moll Model 8
2.2.2 Modes of Operation and the characteristic curve 10
2.2.3 Base Width Modulation 15
2.2.4 Small-signal model of BJT in forward active operation – hybrid-π model. 17
2.3 BJT Noise Analysis 20
Chapter 3 22
3.1 Application of lateral BJT in a differential amplifier input stage 22
3.2 The studied lateral PNP BJT layouts 24
3.3 Microscope image of the chips 29
3.4 Measurement setup for obtaining DC characteristic curves 31
3.5 Lateral BJT characteristic curve measurement 36
3.6 Transconductance Measurement 46
3.7 Noise Analysis 54
3.8 Measured Result Summary 61
Chapter 4 68
4.1 Conclusion 68
4.2 Future works 69
References 71
Appendix 75
參考文獻 References
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