隨著高性能微處理器的設計日趨複雜，和IC設計朝向單一系統晶片的設計，使得微處理器的發展系統中除錯機制的設計，變的越來越困難﹔過去設計概念是從晶片外部的接腳來即時控制或觀測系統的執行狀況，而今日從微處理器的設計觀點來看，由於管線數目增多和嵌入式快取記憶體的設計，使得在晶片外部，不可能可以很正確的即時觀察到系統的內部狀態，再加上今日的IC設計趨勢將多個微處理器或數位信號處理器，嵌入到單一晶片當中，使得除錯工作變的非常困難。
因此在單一晶片中除錯機制(on-chip debugging)的研究，變的非常熱門，許多除錯機制的研究和產品，在硬體和軟體上提供不同的解決方案，這些方法從不同角度來看，有各自的優缺點，和不同的考慮因素，本文的研究希望幫助IC製造者和系統開發者很容易的決定對自己最有利的方式。

An in-circuit emulator (ICE) is an important tool for the development of microprocessor-based systems. External ICE boxes are complex and expensive piece of hardware so their use is usually limited to debugging phases of the microprocessor-based systems that involve hardware/software integration or investigation of real time I/O or bus events. On the other hand, a ROM monitor is inexpensive, but provides less observablity for the microprocessor’s operations. In either case, the design practice of the ICE devices is usually independent to the design task of the microprocessor itself. The performance and cost of the ICE devices are not relevant to the microprocessors since they are two different entities. The ICE’s are used only during the development/debugging of the microprocessor-based systems by substituting the original microprocessor on the socket with the ICE. The ICE is unplugged after debugging and the original microprocessor is placed back into the socket for normal operations of the microprocessor-based systems. Therefore, the performance and cost of the ICE’s do not impact these of the microprocessor-based systems because the ICE’s do not exist in them.
We then define three feasible solutions software, hardware and hybrid) and integrate them with a synthesizable ARM7 icroprocessor core. The microprocessors with the embedded ICE’s are synthesized and simulated to analyze and compare the corresponding hardware/software performance and cost and the debugging features of these approaches.

1. INSTRODUCTION 4
1.1. Motivation 4
1.2. The proposed approach 4
1.3. Research Contribution 5
1.4. Organization 5
2. BACKGROUND 6
2.1. The basic concept of in-circuit emulation 6
2.2. The types of in-circuit emulation [18] [19] 8
3. CLASSIFICATION OF IN-CIRCUIT EMULATION APPROACHES 10
3.1. The Classification Methodology 10
3.1.1 ForeGround Debug Mode (FGDM) 10
3.1.2 BackGround Debug Mode (BGDM) 10
3.1.3 General Mechanism 11
3.1.4 The classification of emulation approaches 12
3.2. Software Emulation 13
3.2.1 Intel x86 DEBUGGING [5] 14
3.2.2 THE BUFFALO MONITOR PROGRAM [4] 15
3.3. Hardware Emulation 18
3.3.1 Embedded In-Circuit Emulator for Microcontroller [2] 19
3.3.2 ARM7TDMI Debug Architecture [1] [21] 24
3.3.3 AMDebugTM Technology [25] 28
3.4. Hybrid Emulation 32
3.4.1 Intel x86 DEBUG REGISTER [5] 32
3.4.2 Motorola CPU32 Background Debug Mode (BDM) [7] [16] 35
4. A QUANTITATIVE CASE STUDY ON THE H/W AND S/W ICE APPROACHES 43
4.1. Software Emulation 43
4.1.1 Debug Mode Switching 44
4.1.2 FGDM 47
4.1.3 BGDM 50
4.2. Hardware Emulation 54
4.2.1 Operating Mode Changing 55
4.2.2 FGDM 59
4.2.3 BGDM 64
4.2.4 Debug Operation Procedure 67
4.3. Hybrid Emulation 70
4.3.1 The SFHB Emulation 70
4.3.2 The HFSB Emulation 74
4.3 Summary 77
5. EXPERIMENTAL RESULTS 78
5.1. Code Size / Gate Count 78
5.2. Operation time 79
5.2.1 Set Single Breakpoint 81
5.2.2 Single-Step 81
5.2.3 Memory Dump 81
5.2.4 Register Dump 82
5.2.5 Exit FGDM 83
5.2.6 Summary 83
5.3. System Resource 84
5.4. Design Complexity 84
5.5. Suitable Application Domain 84
5.6. Communication Device 84
5.7. Breakpoint Condition 85
6. CONCLUSION 86
7. FUTURE WORK 86
8. REFERENCE 87

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