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博碩士論文 etd-1014108-110655 詳細資訊
Title page for etd-1014108-110655
論文名稱
Title
多參數可植入式微電刺激系統之設計與實作
Design and Implementation of A Multi-parameter Implantable Micro-stimulator System
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
91
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2008-10-09
繳交日期
Date of Submission
2008-10-14
關鍵字
Keywords
植入式、微電刺激、解調變器、體外實驗
in vitro, demodulator, micro-stimulation, implantable
統計
Statistics
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中文摘要
本論文提出一多參數可植入式微電刺激系統,係使用無線傳輸多參數控制,可避免傷口感染,更可產生多種刺激波形來符合不同的生醫應用。另外,亦設計一電腦圖形化介面來搭配微電刺激系統,讓使用更為方便。此微電刺激系統也已進行活體外實驗,可成功刺激神經細胞。
此外,為了降低傳統的ASK解調變器中的電容所帶來的系統面積負擔,本論文亦提出一無電容的ASK解調變器,使用偏壓電路為基礎的包跡線偵測電路(envelope detector)搭配一史密特觸發器來進行解調變。另外,藉由改善包跡線偵測電路的電度雜訊容限(noise margin)而設計出一全MOS的ASK解調變器,可進ㄧ步縮小系統面積。
除此之外,提出二種高敏感度電壓對頻率轉換器,以配合全雙工之設計。利用一電壓對電流轉換電路,一充放電電路和一全MOS電壓窗型比較器VWC1,完成一高敏感度的電壓對頻率轉換器VFC1。另外,設計一快速之全MOS電壓窗型比較器VWC2,以提昇VFC2之線性度。
最後,本論文提出一大範圍的輸出輸入單元,做為植入式微電刺激系統對外的傳輸介面。利用堆疊式PMOS與NMOS當做輸出級,搭配一動態閘極偏壓產生電路,可以傳送以及接收不同高低電壓的訊號,同時可避免閘極過壓以及漏電流的問題。
Abstract
This thesis proposes a multi-parameter implantable micro-stimulator system. By using wireless communication and the muli-parameter control, the infection caused by the wound could be avoided and various stimulation waveforms could be generated for different bio-medical applications. Besides, a graphic user interface (GUI) is implemented for the proposed micro-stimulator for the convenience of usage. Moreover, the in vitro experiments are carried out, where the neurons could be stimulated successfully.
To reduce the system area caused by external capacitors required by traditional ASK demodulators, a C-less ASK demodulator is proposed in this thesis. A bias-based envelope detector and a Schmitt trigger are used for demodulation. Moreover, by enlarging the noise margin of the envelope detector, an all-MOS ASK demodulator is carried out such that no passive element is needed and the system area could be further reduced.
Besides, two high sensitivity voltage-to-frequency (VFC) are proposed for the full duplex transmission. By using a voltage-to-current converter, a charge and discharge circuit, and an all-MOS voltage window comparator 1 (VWC1), a high sensitivity VFC1 is accomplished. Moreover, a linear VFC2 is also proposed by including a fast all-MOS voltage window comparator, VWC2.
Finally, a wide range I/O buffer is proposed for the interface of the implantable micro-stimulator system. With the stacked PMOS and NMOS output stage and the dynamic gate bias generator, high voltage and low voltage signals (VDDH and VDDL) could be transmitted and received without any gate-oxide overstress and leakage currents.
目次 Table of Contents
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv
1 Introduction 1
1.1 Motivation and Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Literature Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2.1 Implantable micro-stimulator system . . . . . . . . . . . . . . . . . . . 3
1.2.2 ASK demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2.3 Voltage-to-frequency converter . . . . . . . . . . . . . . . . . . . . . . . 5
1.2.4 Wide-range I/O buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3 Organization of the Thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Multi-parameter Implantable Micro-stimulator System 9
2.1 Multi-parameter Micro-stimulator System . . . . . . . . . . . . . . . . . . . . 9
2.1.1 Packet format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.2 Wireless transmitter and receiver . . . . . . . . . . . . . . . . . . . . . 11
2.2 SOC Design of the Multi-parameter Micro-stimulator . . . . . . . . . . . . . . 12
2.2.1 Power and the regulator . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2.2 On-chip C-less ASK demodulator . . . . . . . . . . . . . . . . . . . . . 14
2.2.3 Baseband schematic design . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3 Measurement and in vitro Experiment . . . . . . . . . . . . . . . . . . . . . . 17
2.3.1 GUI interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.2 Class-E transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.3 Micro-stimulator SOC chip . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.3.4 in vitro experiment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3 Miniaturized ASK Demodulator without Resistor and Capacitor 24
3.1 C-less ASK demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.2 Simulation and Measurement of C-less ASK Demodulator . . . . . . . . . . . . 28
3.3 All-MOS ASK Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.3.1 Prior bias-based C-less ASK demodulator . . . . . . . . . . . . . . . . 29
3.3.2 Circuitry of the all-MOS ASK demodulator . . . . . . . . . . . . . . . 31
3.4 Simulation and Measurement Results of All-MOS ASK Demodulator . . . . . 34
3.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4 Voltage-to-Frequency Converter With High Sensitivity Using An All-MOS
Voltage Window Comparator 39
4.1 All-CMOS Voltage-to-Frequency Converter . . . . . . . . . . . . . . . . . . . . 39
4.1.1 Architecture of the proposed VFC . . . . . . . . . . . . . . . . . . . . . 40
4.1.2 Schematic design of VFC . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.1.3 All-MOS voltage-to-current converter . . . . . . . . . . . . . . . . . . . 41
4.2 All-MOS Voltage Window Comparator 1 (VWC1) . . . . . . . . . . . . . . . . 42
4.3 Implementation and Measurement of VFC1 . . . . . . . . . . . . . . . . . . . 43
4.4 All-MOS Voltage Window Comparator 2 (VWC2) . . . . . . . . . . . . . . . . 46
4.4.1 Linearity analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
4.4.2 Schematic design of VWC2 . . . . . . . . . . . . . . . . . . . . . . . . . 47
4.5 Implementation and Measurement of VFC2 . . . . . . . . . . . . . . . . . . . 48
4.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
5 Wide-Range 5.0/3.3/1.8 V I/O Buffer 53
5.1 Wide-Range 5.0/3.3/1.8 V I/O Buffer . . . . . . . . . . . . . . . . . . . . . . . 53
5.2 Implementation and Measurement . . . . . . . . . . . . . . . . . . . . . . . . . 58
5.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
6 Conclusions and Future Works 65
6.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.2 Future Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Bibliography 68
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