適用於地面傳播之數位影像廣播（Digital Video Broadcasting - Terrestrial, DVB-T）是目前作為定點接收之數位電視的主要標準。而正交分頻多工（Orthogonal Frequency Division Multiplexing, OFDM）解調器則是DVB-T接收機內的關鍵模組。隨著超大型積體電路（Very Large Scale Integrated-circuit, VLSI）技術的快速發展，將整個DVB-T接收機整合在一個系統單晶片（System-on-a-Chip, SOC）是必然的趨勢，然而在混合訊號電路的整合中，頻率合成以及類比對數位轉換器的校正是必須仔細考慮的部分。本論文提出了一個適用於DVB-T接收機的OFDM解調器，並針對這些在整合時會面臨的重要議題進行探討。
本論文所提出的OFDM解調器包括四個部分：時間同步、頻率同步、2K/8K快速傅立葉轉換器、通道估測。此解調器利用OFDM符元內嵌的嚮導訊號來進行頻率飄移以及通道響應的估測與補償。此外，我們利用接收到的訊號的循環字首來找出正確的OFDM符元起點，使2K/8K快速傅立葉轉換器可以正確地進行解調的動作。
因應DVB-T接收器對低相位雜訊的頻率訊號的需求，我們提出了一個使用四倍角公式來合成弦波的直接數位頻率合成器。根據我們所提出的二階四倍角逼近法，此頻率合成器能避免唯讀記憶體的使用，並且能產生具有高解析度與高頻譜純度的數位弦波。
數位校正技術是一個能有效降類比對數位轉換器受雜訊影響的技術，一般的校正電路都需要一個亂數訊號源來進行調變。亂數的品質會直接影響校正的效能，因此亂數訊號產生器的設計是一個重要但卻常被忽略的議題。本論文提出一個根據渾沌系統所設計的亂數產生器，並且能動態調整系統的參數使輸出的亂數能有平坦的功率頻譜密度。

Digital video broadcasting for Terrestrial (DVB-T) is one of the major standards for the fixed reception of digital television services, and the orthogonal frequency division multiplexing (OFDM) demodulator is a critical module of DVB-T receivers. As the remarkable advace of the VLSI (very large scale integration) circuits, the SOC (system-on-a-chip) of the DVB-T receiver is an inevitabel evolution. Considering the integration of the mixed-signal circuits, the issues ot beat could be the frequency synthesis and the calibration of the mixed-signal circuits. Hence, this thesis proposes an OFDM demodulator and discusses the design issues emerged from the SOC integration.

The proposed OFDM demodulator is composed of four blocks: time synchronization, frequency synchronization, 2K/8K mode FFT (fast Fourier transform), and channel estimation. The demodulator utilizes the pilot signals embeded in OFDM symbols to estimate the frequency offset and the channel response. Besides, the demodulator use the cyclic prefix of an OFDM symbol to find the correct starting position of an OFDM symbol, and consequently the payload data of an OFDM symbol can be transmitted to the 2K/8K FFT for further processing.

As the demand for a low noise frequency signal, we propose a direct digital frequency synthesizer (DDFS) based on the quadruple angle approximation. According to the proposed trigonometric 2nd-order quadruple angle approximation, the DDFS can produce a high-resolution and low-phase noise digital sinusoid without any ROM (read only memory).

The digital calibration is an effective scheme to prevent ADCs (analog-to-digital converter) from the interference of noise. A random number generator (RNG) is an essential component for the calibration circuitry. However, the realization of the RNG is an important but long ignored issue. This thesis proposes a RNG based on a chaotic system wherein the coefficients of the system is dynamically changed to attain an ideal random bit stream with flat power spectrum density.

1 Introduction 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Literature Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.1 DVB-T demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.2 Direct digital frequency synthesizer . . . . . . . . . . . . . . . . . . . . 3
1.2.3 Random number generator . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3 Organization of the Dissertation . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 The OFDM Demodulator for DVB-T 7
2.1 Format of a OFDM symbol in DVB-T . . . . . . . . . . . . . . . . . . . . . . 7
2.2 The architecture of the proposed OFDM demodulator . . . . . . . . . . . . . . 9
2.3 Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3.1 Time synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3.2 Frequency synchronization . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.4 2K/8K mode FFT processor for DVB-T . . . . . . . . . . . . . . . . . . . . . 13
2.4.1 FFT theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4.2 Low Power FFT architecture . . . . . . . . . . . . . . . . . . . . . . . . 14
2.4.3 Low-power butterfly unit . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.4.4 Memory considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.5 Channel estimation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.6 Implementation and simulation results . . . . . . . . . . . . . . . . . . . . . . 18
2.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3 A Pipelined ROM-less Direct Digital Frequency Synthesizer Based on the
2nd-order Quadruple Angle Approximation 22
3.1 Trigonometric quadruple angle approximation . . . . . . . . . . . . . . . . . . 22
3.1.1 Trigonometric 1st-order quadruple angle approximation . . . . . . . . . 23
3.1.2 Trigonometric 2nd-order quadruple angle approximation . . . . . . . . 24
3.2 System implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3 Simulation and Physical Measurements . . . . . . . . . . . . . . . . . . . . . . 31
3.3.1 Simulation results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.3.2 Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
i
4 Switched-current 3-Bit CMOS 4.0 MHz wideband random signal generator 36
4.1 The discrete-time chaos algorithm . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.2 Design of the 3-bit random number generator . . . . . . . . . . . . . . . . . . 37
4.2.1 1-bit RNG schematic design . . . . . . . . . . . . . . . . . . . . . . . . 39
4.2.2 Digital normalizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.3 Measurement and testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
4.3.1 Implementation and measurement . . . . . . . . . . . . . . . . . . . . . 42
4.3.2 Testing - long run test . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
5 Conclusion and Future Works 49
5.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
5.2 Future works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
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