隨著高速數位電路朝向高時脈、低電源電壓以及縮小化發展，由於在數位電路當中數位電路本身在作邏輯切換時所產生的同步切換雜訊(SSN)會在封裝以及印刷電路板結構中產生，成為影響高速數位電路性能的因素之一。這樣的雜訊產生會使得數位電路系統當中類比電路以及數位電路功能異常造成誤動作，並且導致嚴重的訊號完整性(SI)以及電磁干擾(EMI)問題，因此，如何削減同步切換雜訊成為高速數位電路設計的挑戰。
在本論文當中，首先針對之前人們對於抑制印刷電路板中同步切換雜訊的方法做說明，並且比較其優缺點。接著，對簡單的EBG結構進行分析與討論，歸納出EBG結構的設計準則。由於數位電路朝向高頻化發展，因此，利用所歸納的設計準則，本人改良原本的Hybrid EBG結構，提出Double L-bridge EBG結構，期望在維持低頻雜訊抑制特性之外，又能改善高頻雜訊抑制性能，此結果經由模擬與實作獲得驗證。並且透過一維集總電路模型估算雜訊抑制頻帶，以期快速評估雜訊抑制範圍。接著，本人又提出了Double Cross EBG結構，除了維持Double L-bridge EBG結構高頻雜訊抑制特性之外，更進一步改善了低頻的雜訊抑制效果，達到一更為寬頻的雜訊抑制，此結果也透過模擬與實作獲得證實。

With electronic devices trending toward higher clock rates, lower voltage levels, and smaller form factors, the simultaneously switching noise (SSN), which is induced in package and printed circuit board, is one of the major factors affecting the performance and design of the high speed digital circuits. This noise will lead to false switching and malfunctioning in digital and/or analog circuits, and causes serious signal integrity (SI) and electromagnetic interference (EMI) problems for the high speed digital systems. Therefore, mitigating the SSN becomes a major challenge for the high speed circuits design.
In this thesis, first of all, we introduce and discuss previously proposed solutions to suppress the SSN. These solutions include the use of decoupling capacitors, isolation moats, and electromagnetic bnadgap (EBG) structures. We analyzed the EBG structures and generated some EBG design rules. As the speed of digital circuits moving toward higher frequencies, the Double L-bridge EBG structure can be used to improve the performance of Hybrid EBG structure by employing the EBG design rules that were generated. The Double L-bridge EBG structure design improved the behavior at the high frequencies, which also maintained the low frequency performance. It is demonstrated numerically and experimentally. For fast estimating the stopband, we use one-dimensional lump circuit model. Then, we propose another structure, named Double Cross EBG structure. This design, compared to the Double L-bridge EBG structure, not only maintained the high frequency performance, but also improved the low frequency behavior. It is also both experimentally and numerically validated.

目錄 I
圖表目錄 III
第一章 序論 1
1.1 研究背景與動機 1
1.2 論文大綱 3
第二章 同步切換雜訊的起源與防治對策 4
2.1 電源分佈網路(Power Delivery Network,PDN) 4
2.2 同步切換雜訊 5
2.2.1 同步切換雜訊的來源 5
2.2.2 同步切換雜訊所產生的效應 8
2.3 去耦合電容對同步切換雜訊的抑制 8
2.4 切割電源平面對同步切換雜訊的抑制 11
2.5 電磁能隙結構(Electromagnetic Bandgap Structure,EBG) 13
2.5.1 蘑菇型電磁能隙結構 14
2.5.2 平面型EBG 結構 15
第三章 EBG 結構分析與討論 19
3.1 帶拒濾波器概念說明 19
3.2 EBG 單位晶胞間細線的效應 20
3.3 EBG 單位晶包縮小化的影響 23
3.4 改變電流路徑所產生的影響 25
3.5 總結 27
第四章 Double L-bridge EBG 結構 29
4.1 Double L-bridge EBG 結構之設計概念 29
4.2 Double L-bridge EBG 結構對同步切換雜訊的抑制效果 30
4.3 Double L-bridge EBG 結構的禁止帶模型 33
4.3.1 頻率與傳播常數關係式推導 33
4.3.2 lump model 中的電感電容值估算 37
第五章 Double Cross EBG 結構 41
5.1 Double Cross EBG 結構之設計概念 41
5.2 Double Cross EBG 結構對同步切換雜訊的抑制效果 42
第六章 結論 47
參考文獻 48

[1] R.R.Tummala,“SOP：What is it and why？A new microsystem-integration technology paradigm-Moore’s law for system integration of miniaturized convergent systems of the next decade,”IEEE Trans. Adv. Packag., vol. 27,no. 2, pp.241-249, May 2004.
[2] 謝金明，高速數位電路設計暨雜訊防制技術，全華科技圖書股份有限公司，1997.
[3] M. Swaminathan, and A. E. Engin, Power Integrity Modeling and Design for Semiconductors and Systems, Prentice-Hall, 2007.
[4] G. T. Lei,R. W. Techentin, and B. K. Gilbert,“High frequency characterization of power/ground-plane structures,”IEEE Trans. Microw. Theory Tech., vol. 47, no. 5, pp. 562-569, May 1999.
[5] K. Ren, C. Y. Wu, and L. C. Zhang,“The restriction on delta-I noise along the power/gorund layer in the high-speed digital printed circuit board,”in Proc. IEEE Int. Electromagn. Compat. Symp., Denver, CO, Aug. 1998, pp.511-516.
[6] T. Sudo, H. Sasaki, N. Masuda, and J. L. Drewniak,“Electromagnetic interference (EMI) of system-on-package (SOP),”IEEE Trans. Adv. Packag., vol. 27, no. 2, pp. 304-314, May 2004.
[7] T. L. Wu, S. T. Chen, J. N. Hwang, and Y. H. Lin,“Numerical and experimental investigation of radiation caused by the switching noise on the partitioned DC reference plances of high-speed PCB,”IEEE Trans. Electromagn. Compat., vol. 46, no. 2, pp. 33-45, Feb. 2004.
[8] S. Radu and D. Hockanson,“An investigation of PCB radiated emissions form simultaneous switching noise,”in Proc. IEEE Int. Electromagn. Compat. Symp., 1999, pp. 893-898.
[9] 黃峻南，“多層高速數位電路板中接地彈跳雜訊對電源品質及其電磁輻射效應之模擬及量測,”中山大學碩士論文第三章，3.1~3.7, June 2002.
[10] 張信珉,“新寬頻電磁能隙(EBG)結構以抑制地彈雜訊之研究,”中山大學碩士論文, April 2004.
[11] R. Abhari, and G. V. Eleftheriades,“Metallo-dielectric electromagnetic bandgap structures for suppression and isolation of the parallel-plate noise in high-speed circuits,”in IEEE Trans. Microwave Theory ＆ Tech., vol. 51, pp. 1629-1639, June 2003.
[12] T. Kamgaing, and O. M. Ramahi,“A novel power plane with integrated simultaneous switching noise mitigation capability using high impedance surface,”IEEE Microwave and Wireless Components Letters, vol. 13, no.1, pp. 21-23, January 2003.
[13] D. F. Sievenpiper,“High-impedance electromagnetic surfaces,”Ph.D. dissertation, Dept. Elect. Eng., Univ. California at Los Angeles, Los Angeles, CA, 1999.
[14] S. Shahparnia, and O. M. Ramahi,“Simultaneous switching noise mitigation in PCB using cascaded high-impedance surfaces,”Electron. Lett., vol. 40, no. 2,pp. 98-100, Jan. 2004.
[15] X. H. Wang, B. Z. Wang, Y. H. Bi, and W. Shao,“A Novel Uniplanar Compact Photonic Bandgap Power Plane With Ultra-Broadband Suppression of Ground Bounce Noise,”in IEEE Microw. Wireless Comp. Lett., vol. 16, no. 5, pp. 267-268, May 2006.
[16] J. Qin, O. M. Ramahi,and V. Granatstein,“Novel Planar Electromagnetic Bandgap Structures for Mitigation of Switching Noise and EMI Reduction in High-Speed Circuits,”in IEEE Trans. Electromagn. Compat., vol. 49, no. 3, pp.661-669, Aug. 2007.
[17] S. H. Joo, D. Y. Kim, and H. Y. Lee,“A S-Bridge Inductive Electromagnetic Bandgap Power Plane for Suppression of Ground Bounce Noise,”in IEEE Microw. Wireless Comp. Lett., vol. 17, no. 10, pp.709-711, Oct. 2007.
[18] T. L. Wu, and T. K. Wang,“Embedded power plane with ultra-wide stop-bnad for simultaneously switching noise on high-speed circuits,”Electron. Lett., vol.42, no.4, Feb. 2006.
[19] 王挺光,“可超寬頻抑制地彈雜訊之封裝級電源頻面,”中山大學碩士論文, June 2005.
[20] R. R. Tummala, E. J. Rymaszewski, and A. G. Klopfenstein, Microelectronics Packaging Handbook, 2nd ed., New York:Chapman & Hall, 1997, pt. I.
[21] S. Caniggia and F. Maradei,Signal Integrity and Radiated Emission of High-Speed Digital Systems,John Wiley & Sons,2008.
[22] S. H. Hall, and H. L. Heck, Advanced Signal Integrity for High-Speed Digital Design, John Wiley & Sons, Inc., 2009.
[23] D. Sievenpiper, R. Broas, and E. Yablonovitch,“Antennas on high-impedence ground planes,”1999 IEEE MTT-S Digest, vol. 3, pp.1245-1248,June 1999.
[24] D. Sievenpiper, L. Zhang, R. Broas, N. Alexopolous, and E. Yablonovitch,“High impedance electromagnetic surfaces with a forbidden frequency band,”IEEE Trans. Microwave Theory and Technique, vol.47, no.11, pp.2059-2074, November 1999.
[25] D.Sievenpiper, H. Hsu, J. Schaffner, G. Tangonan, R. Garcia, and S. Ontiveros,“Low-profile,four-sector diversity antenna on high-impedance ground plane,”Electronics Letters, vol.36, no.16, pp.1343-1345, August 2000.
[26] S. H. Hall, G. W. Hall, and J. A. McCall, High-Speed Digital System Design-A Handbook of Interconnect Theory and Design Practices, John Wiley & Sons,Inc, 2000.
[27] M. Rahman, and M. A. Stuchly,“Transmission line-periodic circuit representation of planar microwave photonic bandgap structures,”Microwave and Optical Technology Letters, vol.30, no.1, July 2001.