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博碩士論文 etd-1026117-180544 詳細資訊
Title page for etd-1026117-180544
論文名稱
Title
應用於微波通訊系統之異質整合六埠變壓式微型功率分配器及四相位下變頻式混頻器
Heterogeneous Integration of MEMS Six-port Transformer-based Power Divider and CMOS Quadrant Down-conversion Mixer for Microwave Communication System
系所名稱
Department
畢業學年期
Year, semester
語文別
Language
學位類別
Degree
頁數
Number of pages
109
研究生
Author
指導教授
Advisor
召集委員
Convenor
口試委員
Advisory Committee
口試日期
Date of Exam
2017-11-17
繳交日期
Date of Submission
2017-11-26
關鍵字
Keywords
系統級封裝技術、CMOS、全相位雙混頻器、多重輸入/輸出、分配器、微機電系統製程
heterogeneous integration, surface micromachining, MIMO, power divider, MEMS
統計
Statistics
本論文已被瀏覽 5692 次,被下載 16
The thesis/dissertation has been browsed 5692 times, has been downloaded 16 times.
中文摘要
隨著物聯系統市場的蓬勃發展,未來無線通訊網路系統必須具備更高的傳輸速度、更遠的傳輸距離以及更準確之資料準確率,使得多重輸入/輸出(Multi-input Multi-output ; MIMO)之技術因應而生;然而在MIMO接收機系統架構中,複數的接收天線需要相對應數量之主被動元件,導致功能相同之分配器元件及相關電路亦同步增加,造成系統架構需佔用更多面積。為了改善上述問題,本論文運用微機電系統(Micro-electromechanical systems ; MEMS)之面型微加工製程技術開發可提供兩對單端訊號轉換至差動訊號功能之分配器被動元件,可減少MIMO接收機系統電路中一半數量的分配器;並運用CMOS製程技術開發可與分配器特性匹配之全相位雙混頻器電路,上述主被動元件經異質整合後的微型晶片符合現今無線通訊網路產品輕薄短小之需求。
此論文所開發之新型一對二分配器元件結構包含下層訊號傳導層、支撐銅柱與介電層、上層訊號傳導層共三層堆疊而成,製程步驟包含六層薄膜沉積、五次黃光微影、三層銅電鍍製程以及四次元件蝕刻釋放結構。此外,為了驗證該多重功率分配器元件之性能,所開發之全相位雙混頻器電路經採用系統級封裝(system in package, SiP)技術將分配器異質整合於高頻專用之PCB板,整合後之微型晶片尺寸為7.6 mm × 3.2 cm,較傳統尺吋減少約30%。
經由模擬與量測結果顯示,本論文所開發之異質整合微型晶片在操作頻率為2.4 GHz時具有7.8 dB之轉換增益,與模擬值僅相差1.4 dB;在高頻特性隔離度部分,量測結果顯示其隔離度為-30 dB,與模擬值(-35 dB)非常接近。除此之外,該異質整合微型晶片具有非常高之線性度(0 dBm),同時在1.8 V之供應電壓下,其消耗功率為34 mW。綜合以上特性,本論文之研究成果未來可應用於無線通訊系統。
Abstract
Wireless communication system with farther transmission distance, higher data rate and information accuracy are developed to satisfy the requirements for multi-input multi-output (MIMO) techniques in the rapidly increasing market of Internet of Things (IoT. However, most devices are similarly passive and active and are with the same functions that consume extra area in the MIMO receiver system. To solve the mentioned problem, this dissertation presents a multiplex power divider with two single-to-differential paths utilizing the surface micromachining process to reduce the components required in MIMO receiver. In addition, we also developed an implemented quadrant down-conversion mixer using CMOS technology and integrated the power divider into heterogeneous microchip, which is suitable for wireless communications network products.
The main structure of power divider consists of a top conducting layer, supporting posts, an insulator and a bottom conducting layer. The main fabrication processes include six thin-film depositions, five graphic definitions of photolithography, three copper electroplating and four etching processes. This dissertation further presents a quadrant down-conversion mixer and the integration of the suspended six-port micro transformer-based power divider with one chip by system in package (SiP) technology. The whole chip size (including the quadrant mixer and the power divider) of heterogeneous integrated chip is 7.2 mm × 3.2 mm, which is 30% smaller than conventional ones.
According to the simulation and measurement results, the proposed heterogeneous integrated chip has the conversion gain of 7.8 dB, the isolation of -30 dB and excellent linearity value IIP3 of 0 dBm at the 2.4 GHz operating frequency. A prototype of this chip was measured at an RF power of -30 dBm with 34 mW of DC power dissipation including buffer stage given a 1.8 V supply. Based on the above characteristics, the research results of this dissertation can be applied to wireless communication systems in the future.
目次 Table of Contents
論文審定書 i
誌謝 iii
中文摘要 v
Abstract vi
Contents viii
List of Figures xi
List of Tables xvi
Chapter 1 Introduction 1
1.1 Research Motivation 1
1.2 Review of Power Divider 4
1.2.1 T-junction Power Divider 7
1.2.2 Wilkinson Power Divider 8
1.2.3 Rat-race Power Divider 9
1.2.4 Transformer 11
1.2.5 MEMS Technology 13
1.3 Down-conversion Mixer 17
1.3.1 Passive Down-conversion Mixer 17
1.3.2 Active Down-conversion Mixer 18
1.4 Overview of Dissertation 23
Chapter 2 Design and Simulation of the Power Divider and Mixer 25
2.1 Six-port Transformer-based Power Divider 25
2.2.1 Characteristic Indexes 25
2.2.2 Design Flow of Power Divider 27
2.2.3 High Frequency EM Simulation of Power Divider 29
2.2 Quadrant Down-conversion Mixer 37
2.2.1 Characteristic Indexes 37
2.2.2 Design Flow of Quadrant Down-conversion Mixer 40
2.2.3 High Frequency EM Simulation of Down-conversion Mixer 43
Chapter 3 Development of Proposed Heterogeneous Integrated chip 52
3.1 Fabrication of Six-port Transformer-based Power Divider 52
3.1.1 Layout Design 52
3.1.2 Fabrication Process Flow 55
3.2 Layout Design of Quadrant Down-conversion Mixer 66
3.3 Heterogeneous Integration of Suspended Six-port Transformer-based Power Divider with Quadrant Down-conversion Mixer 68
Chapter 4 Characterization Results and Discussion 70
4.1 Microstructures Inspection by SEM 70
4.2 Measurement Setup 73
4.3 Simulation and Measurement Results 74
Chapter 5 Conclusions and Future Works 79
5.1 Conclusions 79
5.2 Future Works 80
References 82
Personal Publication 90
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