分散式共享記憶體主要研究目標之一是降低網絡流量並減少延遲。其中一個解決這問題的方法是使用線程遷移。在本篇論文中，我們描述如何在CDPthread系統上實做線程遷移。為了保持高度的可攜性和靈活性，在使用者函式庫中實做一個通用的線程遷移組。這個機制可以將系統資源作更好地利用及提高CDPthread的性能。它也使得程序設計師能輕易的遷移不同節點之間的線程。此外，我們利用線程遷移實作動態負載平衡。從最後的實驗結果看來，動態負載平衡在平均情況下能大幅的提高系統的效能.

One of the primary goals of Distributed Shared Memory (DSM) research is to minimize network traffic and reduce the latency. One way to solve this problem is to use thread migration. In this thesis, we show how thread migration is implemented in a CDPthread-based system. To maintain high portability and flexibility, a generic thread migration package is implemented as a user library. This mechanism can be used to better utilize system resources and improve performance of a CDPthread-based system. It also provides programmer an easy way to migrate threads between different nodes. Moreover, we use thread migration to implement dynamic load balance. Our experimental results show that the dynamic load balance can improve system performance significantly in the average case.

List of Figures iii
List of Listings v
Chapter 1 Introduction 1
1.1 Distributed Shared Memory . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Memory Consistency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.1 Sequential Consistency (SC) . . . . . . . . . . . . . . . . . . . . . . 2
1.2.2 Release Consistency (RC) . . . . . . . . . . . . . . . . . . . . . . . 3
1.2.3 Entry Consistency(EC) . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2.4 Scope Consistency . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2.5 Thread migration in release consistency model . . . . . . . . . . . . 7
1.3 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.4 Contribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.5 Organization of the thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Chapter 2 Related Work 9
2.1 Reserving Memory for Stacks in Other Systems . . . . . . . . . . . . . . . . 9
2.2 Multithreaded Environment for DSM System . . . . . . . . . . . . . . . . . 10
Chapter 3 Design and Implementation of Thread Migration 12
3.1 Migration State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.1 Memory State Migration . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1.2 Communication State Migration . . . . . . . . . . . . . . . . . . . . 14
3.1.3 Kernel State Migration . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2 Thread Migration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2.1 Fixed Address for the System-wide Stack in CDPthread . . . . . . . 15
3.2.2 Basic Software Component in CDPthread . . . . . . . . . . . . . . . 15
3.2.3 Static Stack for Thread Migration in CDPthread . . . . . . . . . . . . 16
3.2.4 Design and Implementation of Thread Migration in CDPthread . . . . 17
3.3 Implementing Dynamic Load Balance . . . . . . . . . . . . . . . . . . . . . 25
Chapter 4 Experimental Results 27
4.1 Experimental Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.2 Thread Migration Works in CDPthread . . . . . . . . . . . . . . . . . . . . . 27
4.3 Dynamic Load Balance Testing . . . . . . . . . . . . . . . . . . . . . . . . . 36
Chapter 5 Conclusion and Future Work 43
5.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Bibliography 47
Appendix A The Testing Program Running on CDPthread Environment with Dynamic
Load Balance 50
Appendix B Set of jobs in the different case 63

[1] P. Keleher, A. L. Cox, H. Dwarkadas, and W. Zwaenepoel, “Treadmarks: Distributed
shared memory on standard workstations and operating systems,” In Proceedings of the
1994 Winter Usenix Conference, pp. 115–131, 1994.
[2] M. Rangarajan and L. Iftode, “Software distributed shared memory over virtual interface
architecture: Implementation and performance,” In Proceedings of the 3rd Extreme
Linux Workshop, pp. 341–352, 2000.
[3] D. J. Scales, K. Gharachorloo, and C. A. Thekkath, “Shasta: A low overhead, softwareonly
approach for supporting fine-grain shared memory,” In Proceedings of the Seventh
International Conference on Architectural Support for Programming Languages and
Operating Systems, pp. 174–185, 1996.
[4] L. Iftode, C. Dubnicki, E. W. Felten, and K. Li, “Improving release-consistent shared
virtual memory using automatic update,” In The 2nd IEEE Symposium on High-
Performance Computer Architecture, pp. 14–25, 1996.
[5] L. Lamport, “How to make a multiprocessor computer that correctly executes multiprocess
programs,” IEEE Transactions on Computers, vol. Volume 28, no. Issue 9, pp. 690–
691, September 1979.
[6] K. Gharachorloo, D. Lenoski, J. Laudon, P. Gibbons, A. Gupta, and J. Hennessy, “Memory
consistency and event ordering in scalable shared-memory multiprocessors,” In
Proceedings of the 17th Annual International Symposium on Computer Architecture,
pp. 15–26, 1990.
[7] B. N. Bershad and M. J. Zekauskas, “Midway: Shared memory parallel programming
with entry consistency for distributed memory multiprocessors,” Annual IEEE International
Computer Conference, pp. 528–537, 1993.
[8] L. Iftode, J. P. Singh, and K. Li, “Scope consistency: A bridge between release consistency
and entry consistency,” In Proceedings of the 8th Annual ACM Symposium on
Parallel Algorithms and Architectures, pp. 277–287, 1996.
[9] J. S. Chase, F. G. Amador, E. D. Lazowska, H. M. Levy, and R. J. Littlefield, “The amber
system: Parallel programming on a network of multiprocessors,” In Proceedings of the
12th ACM Symposium on Operating Systems Principles, pp. 147–158, 1989.
[10] J. Casas, R. Konuru, R. Prouty, J. Walpole, S. W. Otto, and S. W. Otto, “Adaptive load
migration systems for pvm 1 of 23 adaptive load migration systems for pvm,” 1994.
[11] F. Mueller, “Distributed shared-memory threads: Dsm-threads,” In Workshop on Run-
Time Systems for Parallel Programming, pp. 31–40, 1997.
[12] A. Itzkovitz, A. Schuster, and L. Shalev, “Thread migration and its applications in distributed
shared memory systems,” Journal of Systems and Software, vol. 42, pp. 71–87,
1998.
[13] Y. Sudo, S. Suzuki, and S. Shibayama, “Distributed-thread scheduling methods for reducing
page-thrashing,” Proceedings of the 6th IEEE International Symposium on High
Performance Distributed Computing table of contents, pp. 356–364, 1997.
[14] C. Amza, A. Cox, K. Rajamani, and W. Zwaenepoel, “Tradeoffs between false sharing
and aggregation in software distributed shared memory,” in Software Distributed
Shared Memory,”in Proceedings of the Principles and Practice of Parallel Programming,
pp. 90–99, 1997.
[15] G. Antoniu and L. Boug, “Dsm-pm2: A portable implementation platform for multithreaded
dsm consistency protocols,” Parallel and Distributed Processing Symposium.,
Proceedings 15th International, pp. 55–70, 2001.
[16] G.-F. Tseng, “CDPthread: A POSIX-THREAD Based Distributed Computing Environment,”
Master Thesis, pp. 1–151, 2009.
[17] E. Mascarenhas and V. Rego, “Ariadne: Architecture of a portable threads system supporting
mobile processes,” Software-Practice and Experience, vol. 26, pp. 90–99, 1996.
[18] Intel 64 and IA-32 Architectures Software Developer’s Manual, vol. 1. Intel Corporation,
November 2007.
[19] Intel 64 and IA-32 Architectures Software Developer’s Manual, vol. 2A. Intel Corporation,
November 2007.
[20] Intel 64 and IA-32 Architectures Software Developer’s Manual, vol. 2B. Intel Corporation,
November 2007.
[21] Intel 64 and IA-32 Architectures Software Developer’s Manual, vol. 3A. Intel Corporation,
November 2007.
[22] Intel 64 and IA-32 Architectures Software Developer’s Manual, vol. 3B. Intel Corporation,
November 2007.
[23] Y.-C. Chou, “On the Design and Implementation of Load Balancing for CDPthreadbased
Systems,” Master Thesis, pp. 1–44, 2009.