為了改善傳統矽基堆疊耦合器之高插入損失以及不具四相位輸出之特性，本論文運用微機電系統之面型微加工技術設計開發具懸浮結構之平面式四相位正交耦合器，達到降低能量損耗及縮小元件面積之目的，以期能應用於第四代行動通訊系統前端架構中。
為了使四相位正交耦合器具四相位輸出、低損耗、高隔離度之特性，本論文對於結構設計與製程整合提出以下三種方法：(i)藉由懸浮結構之設計以減少基板與元件間寄生電容引起之能量損失；(ii)結構採用串聯耦合器搭配中心抽頭式巴倫器產生四相位之輸出；(iii)引入介電層為空氣之MIM電容進行端埠匹配，並搭配高頻模擬軟體(HFSS and ADS)進行元件最佳化模擬及分析。本論文所開發之耦合器元件結構由支撐銅柱、下電極、耦合層銅柱、以及上電極共四層堆疊銅金屬層所組成，製程包括四次薄膜沉積、四次黃光微影之圖形定義、四次銅電鍍沉積及蝕刻去除之製程。
本論文所設計之懸浮式四相位正交耦合器其整體尺寸為22 mm×12.8 mm×71 µm，藉由網路分析儀量測元件於10 MHz至4.0 GHz之高頻特性，第一代完成之元件經量測結果顯示其中心頻率為825 MHz，四輸出埠之插入損耗分別為-41 dB、-44.7 dB、-44.7 dB、-44.7 dB，四輸出埠之相位分別為88°、21.7°、-74.7°、-175.3°，輸入反射損耗和隔離度分別為-3.9 dB和-32 dB。而改良地平面結構上開孔後之第二代耦合器元件，經由量測結果顯示其中心頻率由825 MHz提升至1.05 GHz，四輸出埠之插入損耗分別為-45 dB、-47.9 dB、-49.8 dB、-51.6 dB，輸入反射損耗為-4.53 dB，隔離度為-37.7 dB，四輸出埠量得之相位分別為138°、56.1°、-25.9°、-145°，可發現改良後元件插入損耗及相位之頻寬上升，且更接近模擬之曲線。

In order to improve the high insertion loss of traditional silicon-based stack coupler and non-four-phase output characteristics. This thesis presents the planar suspended four-phase quadrature coupler utilizing surface micromachining technology to reduce insertion loss and compact size, and can be applied to the manufacturing of the front-end receiver for next-generation mobile communication systems.
To achieve the four-phase quadrature coupler with four-phase output, low insertion loss and high isolation characteristics, the main fabrication processes in this thesis including: (i) utilize suspended structure to reduce the insertion loss caused by parasitic capacitance between device and substrate, (ii) construct of a tandem coupler with center-tapped balun to perform four-phase output, (iii) use the air dielectric layer of MIM capacitors input/output ports matching by employing high frequency simulation software (HFSS and ADS) to optimize the analysis of the coupler. The suspended four-phase quadrature coupler constructed of supported post, bottom electrodes, vias and top electrodes. The main fabrication processes including four thin-film depositions, four graphic definitions of photolithography, four copper electroplating and etching processes.
The chip size of the suspended four-phase quadrature coupler is 22 mm×12.8 mm×71 µm, and measured by network analyzer under frequency range from10 MHz ~ 4 GHz. First generation of suspended coupler result of measurement shows its center frequency is 825 MHz, the insertion loss of four output ports are -41, -44.7, -44.7 and -44.7 dB, the phases of four output ports are 88°, 21.7°, -74.7° and -175.3°, input return loss and isolation are -3.9 and -32 dB, respectively. Second generation of suspended coupler with the improvement of slotting cavities on the ground plane structure. The measurement results show the center frequency is 1.05 GHz, insertion loss of four output ports are -45, -47.9, -49.8 and -51.6 dB, input return loss of -4.53 dB, isolation of -37.7 dB, and the phase of four output ports are 138°, 56.1°, -25.9° and -145°. Obviously, the insertion loss and phase of bandwidth can be further increased and more close to the simulation.

論文審定書...........................................................................................i
摘要...........................................................................................iii
Abstract...........................................................................................iv
誌謝...........................................................................................v
目錄...........................................................................................vi
圖目錄...........................................................................................viii
表目錄...........................................................................................xi
第一章 緒論.................................................................................1
1.1前言..................................................................................1
1.2研究動機與背景.........................................................................2
1.3實驗方法及論文架構..................................................................3
第二章 方向耦合器設計理論簡介.....................................................4
2.1正交(90°)耦合器.........................................................................4
2.1.1耦合線(Coupled-Line)方向耦合器................................................4
2.1.2藍基(Lange)耦合器....................................................................8
2.1.3枝幹(Branch-Line)耦合器............................................................10
2.2 180°耦合器..................................................................................14
2.2.1鼠競(Rat-Race)耦合器.................................................................14
2.3巴倫器(Balun)...............................................................................16
第三章 耦合器之模擬設計與製作..........................................................18
3.1耦合器之特性指標.........................................................19
3.2懸浮式90°耦合器高頻特性模擬.........................................................21
3.3懸浮式180°產生器高頻特性模擬.........................................................25
3.4懸浮式四相位正交耦合器高頻特性模擬.........................................................29
3.5懸浮式四相位正交耦合器之光罩佈局設計.........................................................32
3.6懸浮式四相位正交耦合器之製程整合.........................................................33
3.7懸浮式四相位正交耦合器之製程步驟及參數.........................................................34
第四章 實驗結果與討論.........................................................44
4.1 銅結構之電鍍沉積技術.........................................................44
4.2 懸浮式四相位正交耦合器之高頻特性量測.........................................................46
4.2.1初始結構量測結果與討論.........................................................47
4.2.2改良後結構之量測結果與討論.........................................................52
第五章 結論與未來展望.........................................................56
5.1 結論.........................................................56
5.2 未來展望.........................................................57
參考文獻.........................................................58

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