高介電常數的材料目前已被廣泛的採用於半導體工業，其用途包括做為金氧半場效電晶體的閘極介電層以及非揮發性記憶體的穿隧氧化層等。並且元件的性能的優劣會顯著被高介電常數薄膜的特性所影響。而在低溫下成長的高介電常數薄膜經常會由於其中包含的大量缺陷而產生較大的漏電流，因此需要一道後續的高溫退火處理來減少高介電常數薄膜中的缺陷並改善其薄膜特性。但如我們要將高介電常數材料應用在玻璃或塑膠等玻璃轉換溫度(glass transition temperatures)較低的基板時，就不適用此高溫退火處理。因此在本論文的第一部分，我們利用低溫高壓氧及臭氧的後續處理技術來改善低溫下成長的高介電常數薄膜特性。在這部分的實驗中，我們採用150 ℃、壓力為1500 psi的氧及臭氧處理來取代傳統的高溫退火處理，並有效的改善了厚度為13nm的室溫沉積HfO2 薄膜特性。由XPS分析及處理我們可以確認HfO2 薄膜中的O-Hf 及O-Hf-Si鍵結強度及數量在經過我們的後續處理後有明顯的增加，並且薄膜中氧的含量也有顯著的增加。此外，薄膜在經過高壓氧及高壓臭氧處理後，在3 V偏壓下量測的漏電特性也由原本的3.12×10-6 A/cm2大幅下降到6.27×10-7 及 1.3×10-8 A/cm2，由於薄膜中的缺陷已大部分被修補，載子傳輸機制也由原本的trap-assisted tunneling轉為Schottky-Richardson emission。此低溫高壓氧及臭氧處理可應用在軟性基板上來改善低溫成長的高介電常數薄膜特性。
此外，高介電常數薄膜也被應用在奈米點非揮發性記憶體中做為穿隧氧化層。在本論文的第二部分，我們驗證了SiO2及Al2O3/HfO2複合穿隧氧化層對CoSi2奈米點記憶體特性的影響。由於高介電常數薄膜可在相同的等效厚度(equivalent oxide thicknesses)下提供比SiO2更厚的物理厚度，因此可以提升非揮發性記憶體元件的可靠度並不影響元件的寫入抹除效率。此外，我們並利用不同高介電常數的薄膜及其能帶結構來提高非揮發性記憶體的記憶特性。採用HfO2/Al2O3/HfO2複合穿隧氧化層的元件可比採用SiO2做為穿隧氧化層的元件擁有更大的記憶窗口及更高的載子注入效率。而採用Al2O3/HfO2/Al2O3複合穿隧氧化層的元件則可表現出更好的記憶保存能力。相關的能帶機制我們也會在論文中探討。
近幾年來，由於非揮發性記憶體的應用與發展備受矚目，加上快閃記憶體在微縮上遇到難以突破的瓶頸，所以新穎式非揮發性記憶體的研究與開發正蓬勃地展開。其中，電阻式非揮發性記憶體元件具有結構簡單、耗損能量低、操作電壓低、密度高、操作速度快、耐久度高、儲存時間長和非破壞性存取等優點，使其成為新穎式非揮發性記憶體元件的最熱門人選。而在新穎式非揮發性記憶體的研究上，高介電常數薄膜也被應用在電阻式非揮發性記憶體中做為電阻轉換層。在本論文的第三部分中，我們研究了TiN/Ti/HfO2/TiN結構的電阻式記憶體，此元件的電阻轉態機制是由HfO2層中的HfOX及Hf間氧化還原反應所主導，而Ti擁有很高的氧吸收能力可做為氧化還原反應時的氧儲存槽，因此採用TiN/Ti雙層結構可大幅的提高元件的電阻轉換特性及穩定度。此元件並擁有多位元儲存的能力，可提高資料的儲存密度。經由變溫量測可驗證在低阻態時Hf會在HfO2層中形成導通路徑，而Hf導通路徑被氧化回HfOX後，元件會回到高阻態。此外，我們並發現低溫可能使元件在多次操作時產生不同品質及數量的導通路徑，造成高阻態及低阻態的電阻值有很大的分布範圍並造成不穩定的電阻轉換特性。而經由參數分析也驗證了其電阻轉態機制的正確性。
最後，我們研究一種新穎的銅趨入式電阻式非揮發性記憶體。其元件結構為Pt/Cu/SiON/TiN/SiO2/Si，由於我們在Pt上電極及SiON層間引入了Cu薄膜，使得此元件可在經過13.6 V的形成製程(forming process)操作後產生雙極(bipolar)電阻轉換特性。而如果缺少了Cu薄膜，SiON薄膜就不會產生電阻轉換特性。我們也引入了一種兩階段式的形成製程，成功的將形成電壓(forming voltage)下降至7.5 V。經過形成製程後，Cu會驅入到SiON層內形成一個尖端的延伸電極，但由於此元件的set電壓與forming電壓極性不同，我們認為位於TiN電極及延伸電極間的SiON薄膜，氧空缺的形成與復合主導電阻轉換。此元件在經過105次的耐操度(endurance)及85℃下保存能力(retention)的測試，仍然維持良好的記憶窗口。藉由載子傳導機制的分析，可發現在不同電場方向下會產生非對稱的載子傳輸機制，我們也利用能帶圖來解釋各段電流之成因。此外，藉由介電質載子傳輸公式計算，發現不同厚度的SiON電阻式記憶體元件都具有相同約8~9 nm的有效轉態層厚度，我們預測並驗證極薄的SiON(約8 nm)也具有電阻轉態特性。然而銅趨入會形成尖端電場，電阻切換路徑都會固定在尖端附近，因此以電場趨入銅於SiON的電阻式記憶體元件特性，遠比極薄的SiON電阻式記憶體特性穩定。這些結果都驗證了其轉態機制是由銅延伸電極及TiN下電極間的氧空缺導通路徑所主導。

This thesis contains four parts. In the first part, we investigate the post treatment of low-temperature-deposited high dielectric constant (high-k) thin films to enhance their properties. The high-pressure oxygen (O2 and O2+UV light) is employed to improve the properties of low-temperature-deposited metal oxide dielectric films and interfacial layer. In this study, 13nm HfO2 thin films are deposited by sputtering method at room temperature. Then, the oxygen treatments with a high-pressure of 1500 psi at 150 ℃ are performed to replace the conventional high temperature annealing. According to the XPS analyses, integration area of the absorption peaks of O-Hf and O-Hf-Si bonding energies apparently raise and the quantity of oxygen in deposited thin films also increases from XPS measurement. In addition, the leakage current density of standard HfO2 film after O2 and O2+UV light treatments can be improved from 3.12×10-6 A/cm2 to 6.27×10-7 and 1.3×10-8 A/cm2 at |Vg| = 3 V. The leakage current density is significantly suppressed and the current transport mechanism is transformed from trap-assisted tunneling to Schottky-Richardson emission due to the passivation of traps inside HfO2 film and interfacial layer. The proposed treatment is applicable for the future flexible electronics.
In the second part of this thesis, we study the memory characteristics of CoSi2 nanocrystals with SiO2 or Al2O3/HfO2 multiple layer tunnel oxide. Due to the property of high-k, it can provide thicker physics thickness than thermal oxide (SiO2) under identical equivalent oxide thickness (EOT) and enhances the reliability without reducing the programming speed. By engineering the different dielectric constant materials and the energy band structure, the performance of nonvolatile memory can be improved. The device that employs HfO2/Al2O3/HfO2 as tunnel oxide exhibits better memory window and carrier injection efficiency than the device employing thermal oxide. Furthermore, the device employs Al2O3/HfO2/Al2O3 as tunnel oxide present the better retention characteristics than the device employs HfO2/Al2O3/HfO2 as tunnel oxide. The corresponding mechanisms were also discussed.
For the advanced nonvolatile application, high-k material - hafnium oxide was applied on the resistance switching nonvolatile memory device as resistive switching layer with TiN/Ti/HfO2/TiN structure in the third part of this thesis. By using a thin Ti layer as the reactive buffer layer into the anode side, the proposed device exhibits superior bistable characteristics. Since the Ti can easily absorb oxygen atoms from buried HfO2, the TiN/Ti bi-layer can greatly improve the resistive switching characteristics. The mechanism of the proposed device is dominated by the redox reaction between the Hf and HfOX. In addition, the proposed device has multi-bit storage ability to enhance the storage density. From the temperature-dependent measurements, the low ambient temperatures would cause the formation and rupture of the conduction path with discordant quality and quantity during every switching cycle, which give rise to a wide distribution of the HRS and LRS resistance and instability of resistive switching properties.
In the fourth part of this thesis, we investigate the characteristics of an advanced Cu-induced resistance switching non-volatile memory with Pt/Cu/SiON/TiN/SiO2/Si structure. By inserting a Cu ultra thin film between the SiON layer and Pt top electrode, the device exhibits bipolar resistive switching characteristics after a forming process at 13.6 V. However, the forming and resistive switching process can not be observed in the device if the Cu thin film is omitted. Additionally, we employ a two-step forming process to reduce the forming voltage to 7.5 V. During the forming process, the bias-induced Cu could form a filament-like stretched electrode, but the “set” and “forming” voltage of the proposed device take place on different polarity. Therefore, we suppose a bipolar switching mechanism, and our device is dominated by the formation and rupture of the oxygen vacancies in a conduction path between the Cu filament and TiN button electrode. The device also demonstrates stable resistance states during 105 cycling bias pulse operations and acceptable retention characteristics after an endurance test at 85℃. The I-V switching curves are analyzed to realize the carrier transport mechanisms in different bias regions and resistance states. Additionally, the effective thickness of the resistance switching layers (deff) for the samples with different SiON thickness is also extracted from the related mechanism and demonstrated that the deff is independent with the initial SiON thickness. The corresponding mechanisms and the deff verify the bipolar switching is dominated by the formation and rupture of the oxygen vacancies in conduction path between Cu filament and TiN bottom electrode.

Contents
Abstract (Chinese) i
Abstract (English) v
Acknowledgements ix
Contents xi
Table Captions xv
Figure Captions xvi

Chapter 1 Introduction
1.1 Overview of High-k Material 1
1.2 Overview of Nonvolatile Memory 3
1.2.1 SONOS Nonvolatile Memory Devices 6
1.2.2 Nanocrystal Nonvolatile Memory Devices 8
1.2.3 Resistance Random Access Memories (RRAMs) device 11
1.3 Outline of the thesis 15
Reference 17

Chapter 2 The principle of electrical characteristic
2.1 The mechanism of current conduction 30
2.1.1 Ohmic conduction 30
2.1.2 Direct tunneling 31
2.1.3 Fowler-Nordheim tunneling 31
2.1.4 Schottky emission 33
2.1.5 Poole-Frenkel emission 34
2.1.6 Trap assisted tunneling 35
2.1.7 Space charge limited current 36
2.2 Basic Program and Erase Mechanisms of Nonvolatile memory 36
2.2.1 Energy band diagram during program and erase operation 36
2.2.2 Carrier Injection Mechanisms 37
2.2.2.1 Tunneling Injection 38
2.2.2.2 Channel Hot Electron Injection (CHEI) 41
2.2.2.3 Band to Band Tunneling (BTBT) 42
2.3 The switching mechanism of resistive RAM 44
2.3.1 Filamentary model 44
2.3.1.1 Joule heating effect 45
2.3.1.2 Redox processes by cation migration 46
2.3.1.3 Redox processes by anion migration 47
2.3.2 Modified Schottky barrier model 49
Reference 51

Chapter 3 Improvement on low-temperature deposited HfO2 film and interfacial layer
3.1 Introduction 64
3.2 Experiment 66
3.3 Results and Discussion 67
3.4 Summary 72
Reference 74

Chapter 4 Enhancement on the electrical property of nanocrystal nonvolatile memory with high-k dielectrics structure
4.1 Introduction 84
4.2 Experiment 86
4.3 Results and Discussion 87
4.4 Summary 91
Reference 93

Chapter 5 Investigation of the resistive switching properties on the Ti/HfO2 thin film with temperature influence
5.1 Introduction 106
5.2 Experiment 107
5.3 Results and Discussion 108
5.4 Summary 114
Reference 116

Chapter 6 Influence of bias-induced copper diffusion on the resistive switching characteristics of SiON thin film
6.1 Introduction 129
6.2 Experiment 130
6.3 Results and Discussion 131
6.4 Summary 139
Reference 141

Chapter 7 Conclusion
7.1 Summary of Experimental Works 153

Publication List 157

1.1 G. D. Wilk, R. M. Wallace, and J. M. Anthony, J. Appl. Phys., vol. 10 pp. 5243, 2001
1.2 C. H. Lee, S. H. Hur, Y. C. Shin, J. H. Choi, D. G. Park, and K. Kim, Appl. Phys. Lett., vol. 86, 152908, 2005.
1.3 Chia-Wen Chang, Student Member ,IEEE ELECTRON DEVICE LETTERS, VOL. 29, NO. 1, 2008
1.4 S. Lai, Future Trends of Nonvolatile Memory Technology, December 2001.
1.5 S. Aritome, IEEE IEDM Tech. Dig., 2000, p.763.
1.6 P. Pavan, R. Bez, P. Olivo, and E. Zanoni, “Flash memory cells—An overview” Proc. IEEE, vol. 85, pp. 1248–1271, Aug. 1997.
1.7 Roberto Bez, Emilio Camerlenghi, Alberto Modelli, and Angelo Visconti, “Introduction to Flash Memory” Proc. IEEE, vol. 91, NO.4, April 2003.
1.8 D. Kahng and S. M. Sze, “A floating gate and its application to memory devices”, Bell Syst. Tech, 46, 1288 (1967).
1.9 J. D. Blauwe, “Nanocrystal nonvolatile memory devices”, IEEE Transaction on Nanotechnology, 1, 72 (2002).
1.10 M. H. White, Y. Yang, A. Purwar, and M. L. French, ”A low voltage SONOS nonvolatile semiconductor memory technology”, IEEE Int’l Nonvolatile Memory Technology Conference, 52 (1996).
1.11 M. H. White, D. A. Adams, and J. Bu, “On the go with SONOS,” IEEE circuits & devices, 16, 22 (2000).
1.12 H. E. Maes, J. Witters, and G. Groeseneken, Proc. 17 European Solid State Devices Res. Conf. Bologna 1987, 157 (1988).
1.13 S. Tiwari, F. Rana, K. Chan, H. Hanafi, C. Wei, and D. Buchanan, “Volatile and non-volatile memories in silicon with nano-crystal storage”, IEEE Int. Electron Devices Meeting Tech. Dig., 521 (1995).
1.14 J. J. Welser, S. Tiwari, S. Rishton, K. Y. Lee, and Y. Lee, “Room temperature operation of a quantum-dot flash memory”, IEEE Electron Device Lett., 18, 278 (1997).
1.15 Y. C. King, T. J. King, and C. Hu, “MOS memory using germanium nanocrystals formed by thermal oxidation of Si1-xGex”, IEEE Int. Electron Devices Meeting Tech. Dig., 115 (1998).
1.16 T.Y.Chan, K.K.Young and C.Hu, “A true single-transistor oxide- nitride-oxide EEPROM device”. IEEE Electron Device Letters, vol.8, no.3, pp.93-95, 1987.
1.17 M.K. Cho and D.M.Kim, “High performance SONOS memory cells free of drain turn-on and over-erase: compatibility issue with current flash technology”, IEEE Electron Device Letters, pp.399-401, Vol.21, No.8, 2000.
1.18 I. Fijiwara, H.Aozasa, K.Nomoto, S.Tanaka and T.Kobayashi, “ High speed program/erase sub 100nm MONOS memory cell”, Proc. 18th Non-Volatile Semiconductor Memory Workshop, p. 75, 2001.
1.19 H. Reisinger, M. Franosch, B. Hasler, and T. Bohm, Symp. on VLSI Tech. Dig. , 9A-2, 113 (1997).
1.20 C. Tung-Sheng, W. Kuo-Hong, C. Hsien, and K. Chi-Hsing, “Performance improvement of SONOS memory by bandgap engineering of charge-trappinglayer”, IEEE Electron Device Lett., vol. 25, no. 3, pp.205–207, Mar. 2004.
1.21 Min She, Hideki Takeuchi, and Tsu-Jae King, “Silicon-Nitride as a Tunnel Dielectric for Improved SONOS-Type Flash Memory”, IEEE Electron Device Letters, vol. 24, no. 5, MAY 2003.
1.22 Shih-Ching Chen, Ting-Chang Chang, Po-Tsun Liu, Yung-Chun Wu, and Ping-Hung Yeh, “Nonvolatile polycrystalline silicon thin-film-transistor memory with oxide/nitride/oxide stack gate dielectrics and nanowire channels”, Applied Physics Letters 90, 122111 (2007)
1.23 Peiqi Xuan, Min She, Bruce Harteneck, Alex Liddle, Jefkey Bokor, and Tsu-Jae King, “FinFET SONOS Flash Memory for Embedded Applications”, IEEE IEDM 609-612 (2003).
1.24 Tzu-Hsuan Hsu, Hang Ting Lue, Ya-Chin King, Jung-Yu Hsieh, Erh-Kun Lai, Kuang-Yeu Hsieh, and Chih-Yuan Lu, “A High-Performance Body-Tied FinFET Bandgap Engineered SONOS (BE-SONOS) for NAND-Type Flash Memory”, IEEE Electron Device Letters, vol. 28, no. 5, MAY 2007.
1.25 S. Tiwari, F. Rana, K. Chan, H. Hanafi, W. Chan, and Doug Buchanan, IEDM Tech. Dig., p.521 (1995)
1.26 J De Blauwe, “Nanocrystal nonvolatile memory devices”, IEEE Trans. Nanotechnol, 2002.
1.27 Zengtao Liu, Chungho Lee, Venkat Narayanan, Gen Pei, and Edwin Chihchuan Kan, “Metal Nanocrystal Memories—Part I: Device Design and Fabrication”, IEEE Trans. Electron Devices, VOL. 49, NO. 9, SEPTEMBER 2002.
1.28 Jong Jin Leea, Yoshinao Harada Jung, Woo Pyun, and Dim-Lee Kwong “Nickel nanocrystal formation on HfO2 dielectric for nonvolatile memory device applications”, Applied Physics Letters 86, 103505 (2005)
1.29 S. K. Samanta, Won Jong Yoo, and Ganesh Samudra, “Tungsten nanocrystals embedded in high-k materials for memory application”, Applied Physics Letters 87, 113110 (2005)
1.30 G. I. Meijer, “Who Wins the Nonvolatile Memory Race?,” Science, vol. 319, pp. 1625, March 2008.
1.31 I. G. Baek, M. S. Lee, S. Seo, M. J. Lee, D. H. Seo, D.-S. Suh, J. C. Park, S. O. Park, H. S. Kim, I. K. Yoo, U-In Chung, and J. T. Moon, “Highly Scalable Non-volatile Resistive Memory using Simple Binary Oxide Driven by Asymmetric Unipolar Voltage Pulses,” Tech. Dig. - Int. Electron Devices Meet., vol. 587, 2004.
1.32 R. Waser and M. Aono, “Nanoionics-based resistive switching memories,” Nature Mater, vol. 6, pp. 833, November 2007.
1.33 Hickmott T. W. 1962 J. Appl. Phys. 33 2669
1.34 Dearnaley G., Stoneham A M and Morgan D V 1970 Rep. Prog. Phys. 33 1129
1.35 Oxley D P 1977 Electrocomponent Sci. Technol. 3 217
1.36 Beck A., Bednorz J G, Gerber Ch, Rossel C and Widmer D 2000 Appl. Phys. Lett. 77 139
1.37 http://theeestory.com/topics/4141
1.38 A. Sawa, T. Fujii, M. Kawasaki and Y. Tokura, “Hysteretic current-voltage characteristics and resistance switching at a rectifying Ti/Pr0.7Ca0.3MnO3 interface”, Applied Physics Letters, 85(18), 2000
1.39 A. Baikalov, Y. Q. Wang et al., “Field-Driven Hysteretic and Reversible Resistive Switch at the Ag-Pr0.7Ca0.3MnO3 Interface”, Applied Physics Letters, 83(5), 2003
1.40 L. P. Ma, J. Liu et al.,” Organic electrical bistable devices and rewritable memory cells”, Applied Physics Letters, 80(16), 2002
1.41 S. Seo, M. J. Lee et al.,”Reproducible resistance switching in polycrystalline NiO films”, Applied Physics Letters, 85(23), 2004

2.1 S. M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, third ed.
2.2 Dieter K. Schroder, Semiconductor Material and Device Characterization.
2.3 S. Jeon, H. Yang, D. G. Park, and H. Hwang, “Electrical and structural properties of nanolaminate (Al2O3/ZrO2/Al2O3) for metal oxide semiconductor gate dielectric applications”, Jpn. J. Appl. Phys. Vol. 41, no. 4B, pp. 2390 (2002).
2.4 T. Ohnakado, H. Onoda, O. Sakamoto, K. Hayashi, N. Nishioka, H. Takada, K. Sugahara, N. Ajika and S. Satoh, “Device characteristics of 0.35
2.5 J. Bu, M. H. White, “Design considerations in scaled SONOS nonvolatile memory devices”, Solid-State Electronics., Vol. 45, pp. 113 (2001)
2.6 M. L. French, M. H. White., “Scaling of multidielectric nonvolatile SONOS memory structures”, Solid-State Electron., Vol. 37, pp. 1913 (1995)
2.7 M. L. French, C. Y. Chen, H. Sathianathan, M. H. White., “Design and scaling of SONOS multidielectric device for nonvolatile memory applications”, IEEE Trans Comp Pack and Manu Tech part A., Vol. 17, pp. 390 (1994)
2.8 Y. S. Hisamune, K. Kanamori, T. Kubota, Y. Suzuki, M. Tsukiji, E. Hasegawa, A. Ishitani, and T. Okazawa, "A high capacitive-coupling ratio (HiCR) cell for 3 V-only 64 Mbit and future flash memories", IEDM Tech. Dig., pp. 19 (1993)
2.9 Z. Liu, C. Lee, V. Narayanan, G. Pei, and E. C. Kan,“Metal nanocrystal memories-part II: electrical characteristics”, IEEE Transactions of Electron Devices., Vol. 49, pp. 1606 (2002)
2.10 J. Moll, Physics of Semiconductors.
2.11 M. Lezlinger and E. H. Snow, “Fowler-Nordheim tunneling into thermally grown SiO2”, J. Appl. Phys., Vol. 40, pp. 278 (1969)
2.12 Christer Sevensson and Ingemar Lundstrom, “Trap‐assisted charge injection in MNOS structures”, J. Appl. Phys., Vol. 44, pp. 4657 (1973)
2.13 P. E. Cottrell, R. R. Troutman, and T. H. Ning, “Hot-electron emission in n-channel IGFETs”, IEEE J. Solid-State Circuits, Vol. 14, pp. 442 (1979)
2.14 C. Hu, “Lucky-electron model of channel hot electron emission”, IEDM Tech. Dig., pp. 22 (1979)
2.15 S. Tam, P. K. Ko, C. Hu, and R. Muller, “Correlation between Substrate and Gate Currents in MOSFET's”, IEEE Trans. Elec. Dev., Vol. 29, pp. 1740 (1982)
2.16 I. C. Chen, C. Kaya, and J. Paterson, “Band-to-band tunneling induced substrate hot-electron (BBISHE) injection : a new programming mechanism for nonvolatile memory devices”, IEDM Tech. Dig., pp. 263 (1989)
2.17 I. C Chen, D. J. Coleman, and C. W. Teng, “Gate current injection initiated by electron band-to-band tunneling in MOS devices”, IEEE Elec. Dev. Lett., Vol. 10, pp. 297 (1989)
2.18 T. Ohnakado, K. Mitsunaga, M. Nunoshita, H. Onoda, K. Sakakibara, N. Tsuji, N. Ajika, M. Hatanaka and H. Miyoshi, “Novel electron injection method using band-to-band tunneling induced hot electrons (BBHE) for flash memory with a P-channel cell”, IEDM Tech. Dig., pp.279 (1995)
2.19 Suk-Kang Sung, I1-Han Park, Chang Ju Lee, Yong Kyu Lee, Jong Duk Lee, Byung-Gook Park, Soo Doo Chae, and Chung Woo Kim, ”Fabrication and Program/Erase Characteristics of 30-nm SONOS Nonvolatile Memory Devices, ” IEEE Transactions on Nanotechnology, Vol.2, No.4 (2003)
2.20 Akihito Sawa, “Resistive switching in transition metal oxide”, materials today, Vol. 11, pp.28~36 (2008)
2.21 B. Sun, L. F. Liu, Y. Wang, D. D. Han, X. Y. Liu, R. Q. Han, J F. Kang, “Bipolar Resistive Switching Behaviors of Ag/Si3N4/Pt Memory Device”, IEEE, 2008
2.22 H. A. Fowler, J. E. Devaney, and J. G. Hagedorn, "Growth model for filamentary streamers in an ambient field," IEEE Transactions on Dielectrics and Electrical Insulation, Vol. 10, pp. 73 (2003)
2.23 R. Waser, M. Aono, “Nanoionics-based resistive switching memories”, Nature materials, Vol. 6 (2007)
2.24 C. Yoshida, K. Tsunoda et al., “High speed resistive switching in Pt/TiO2/TiN film for nonvolatile memory application”, Applied Physics Letters, Vol. 91, pp. 2235110 (2007)

3.1 G. D. Wilk, R. M. Wallace, and J. M. Anthony, “High-k Gate Dielectrics: Current Status and Materials Properties Considerations”, Journal of Applied Physics, Vol. 89, pp. 5243 (2001)
3.2 M. Gutowski, J. E. Jaffe, C. L. Liu, M. Stoker, R. I. Hegde, R. S. Rai, and P. J. Tobin, “Thermodynamic stability of high-K dielectric metal oxide ZrO2 and HfO2 in contact with Si and SiO2”, Applied Physics Letters, Vol. 80, pp. 1897 (2002)
3.3 X. Wang and D. L. Kwong, “A Novel High-κ SONOS Memory Using TaN/Al2O3/Ta2O5/HfO2/Si Structure for Fast Speed and Long Retention Operation”, IEEE Trans. Electron Devices, Vol. 53, pp. 78 (2006)
3.4 C. H. Lee, S. H. Hur, Y. C. Shin, J. H. Choi, D. G. Park, and K. Kim, “Charge-trapping device structure of SiO2/ SiN/ high-κ dielectric Al2O3 for high-density flash memory”, Appl. Phys. Lett., Vol. 86, pp. 152908 (2005)
3.5 J. Robertson, “High dielectric constant oxides”, Eur. Phys. J. Appl. Phys., Vol. 28, pp. 265 (2004)
3.6 C. W. Chang, C. K. Deng, J. J. Huang, H. R. Chang, and T. F. Lei, “High-Performance Poly-Si TFTs With Pr2O3 Gate Dielectric”, IEEE Trans. Electron Device Letters., Vol. 29, pp. 96 (2008)
3.7 K. Kukli, M. Ritala, J. Aarik, T. Uustare, and M. Leskela, “Influence of growth temperature on properties of zirconium dioxide films grown by atomic layer deposition”, Journal of Applied Physics., Vol. 92, pp. 1833 (2002)
3.8 T. S. Jeon, J. M. White, and D. L. Kwong, “Thermal stability of ultrathin ZrO2 films prepared by chemical vapor deposition on Si(100)”, Applied Physics Letters., Vol. 78, pp. 368 (2001)
3.9 S. Jakschik, U. Schroeder, T. Hecht, M. Gutsche, H. Seidl, and J. W. Bartha, “Crystallization behavior of thin ALD-Al2O3 films“, Thin Solid Films., Vol. 425, pp. 216 (2003)
3.10 B. H. Lee, L. Kang, W. J. Qi, R. Nieh, Y. Jeon, K. Onishi, and J. C. Lee, “Ultrathin hafnium oxide with low leakage and excellent reliability for alternative gate dielectric application”, Tech. Dig. - Int. Electron Devices Meet., pp. 133 (1999)
3.11 S. C. Chen, J. C. Lou, C. H. Chien, P. T. Liu, and T. C. Chang, “An interfacial investigation of high-dielectric constant material hafnium oxide on Si substrate”, Thin Solid Films., Vol. 488, pp. 167 (2005)
3.12 C. Wiemer, S. Ferrari, M. Fanciulli, G. Pavia, and L. Lutterotti, “Combining grazing incidence X-ray diffraction and X-ray reflectivity for the evaluation of the structural evolution of HfO thin films with annealing”, Thin Solid Films., Vol. 450, pp. 134 (2004)
3.13 C. S. Yang, L. L. Smith, C. B. Arthur, and G. N. Parsons, “Stability of low-temperature amorphous silicon thin film transistors formed on glass and transparent plastic substrates”, J. Vac. Sci. Technol., Vol. B 18, pp. 683 (2000)
3.14 S. Maikap, Je-Hun Lee, R. Mahapatra, Samik Pal, Y.S. No, Won-Kook Choi, S.K. Ray, Doh-Y. Kim, “Effects of interfacial NH3 /N2O-plasma treatment on the structural and electrical properties of ultra-thin HfO2 gate dielectrics on p-Si substrates”, Solid-State Electronics., Vol. 49, pp. 524 (2005)
3.15 C. Tang and R. Ramprasada, “Oxygen defect accumulation at Si:HfO2 interfaces”, Applied Physics Letters., Vol. 92, pp. 182908 (2008)
3.16 L. Wang, K. Xue, J. B. Xu, A. P. Huang, Paul K. Chu, “Control of interfacial silicate between HfO2 and Si by high concentration ozone”, Applied Physics Letters., Vol. 88, pp. 072903 (2006)
3.17 L. Wang, P. K. Chu, A. Anders, and N. W. Cheung, “Effects of ozone oxidation on interfacial and dielectric properties of thin HfO2 films”, Journal of Applied Physics., Vol. 104, pp. 054117 (2008)
3.18 Li-ping Feng, Zheng-tang Liu, Ya-ming Shen, “Compositional, structural and electronic characteristics of HfO2 and HfSiO dielectrics prepared by radio frequency magnetron sputtering”, Vacuum., Vol. 83, pp. 902 (2009)
3.19 S. Jeon, H. Yang, D. G. Park, and H. Hwang, “Electrical and structural properties of nanolaminate (Al2O 3/ZrO2/Al2O3) for metal oxide semiconductor gate dielectric applications”, Jpn. J. Appl. Phys., Vol. 41, No. 4B, pp. 2390 (2002)
3.20 S. M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, third ed., pp. 227
3.21 S. M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, third ed., pp. 216-219

4.1 R. Bez, E. Camerlenghi, A. Modelli, and A. Visconti, “Introduction to Flash Memory”, Proceedings of the IEEE, Vol. 91, No. 4, pp. 489 (2003).
4.2 J. D. Blauwe, “Nanocrystal nonvolatile memory devices”, IEEE Trans. Nanotechnol., Vol. 1, pp. 72 (2002).
4.3 C. Y. Lu, T. C. Lu, and R. Liu, “Non-volatile memory technology-today and tomorrow”, Proceedings of 13th IPFA, pp. 18 (2006).
4.4 S. Tiwari, F. Rana, K. Chan, H. Hanafi, W. Chan, and D. Buchanan, “Volatile and non-volatile memories in silicon with nano-crystal storage”, IEDM Tech. Dig., pp. 521 (1995)
4.5 Z. Liu, C. Lee, V. Narayanan, G. Pei, and E. C. Kan, “Metal nanocrystal memories, part I: device design and fabrication”, IEEE Trans. Electron Devices., Vol. 49, No. 9, pp.1606 (2002).
4.6 S. K. Samanta, W. J. Yoo, G. Samudra, E. S. Tok, L. K. Bera, and N. Balasubramanian, “Tungsten nanocrystals embedded in high-k materials for memory application”, Appl. Phys. Lett., Vol. 87, pp. 113110 (2005).
4.7 T. C. Chang, P. T. Liu, S. T. Yan, and S. M. Sze, “Electron Charging and Discharging Effects of Tungsten Nanocrystals Embedded in Silicon Dioxide for Low-Voltage Nonvolatile Memory Technology”, Electrochem. Solid-State Lett., Vol. 8(3), pp. G71-G73 (2005)
4.8 J. J. Lee, Y. Harada, J. W. Pyun, and D. L. Kwong, “Nickel nanocrystal formation on HfO2 dielectric for nonvolatile memory device applications”, Appl. Phys. Lett., Vol. 86, pp. 103505 (2005).
4.9 C. C. Wang, J. Y. Tseng, T. B. Wu, L. J. Wu, C. S. Liang, and J. M. Wu, “ Charging characteristics of Au-nanocrystals embedded in metal-oxide-semiconductor structures“, J. Appl. Phys., Vol. 99, pp. 026102 (2006)
4.10 Ch. Sargentis, K. Giannakopoulos, A. Travlos, and D. Tsamakis, “Fabrication and characterization of a metal nanocrystal memory using molecular beam epitaxy”, Journal of Physics: Conference Series, Vol. 10, pp. 53-56 (2005)
4.11 D. Zhao, Y. Zhu, R. Li, and J. Liu, “Transient process in a Ge/Si hetero-nonocrystal p-channel memory”, Solid-State Electronics., Vol. 50, pp. 362 (2006).
4.12 R.E. dos Santos, I. Doi, J.A. Diniz; J.W. Swart, S.G. dos Santos Filho, “Investigation of Ni silicides formation on (100) Si by X-ray Diffraction (XRD)”, Revista Brasileira de Aplicacoes de Vacuo, Vol. 23, No. 1, pp. 32-35 (2004)
4.13 Jongwan Jung and Won-Ju Cho, “Tunnel Barrier Engineering for Non-Volatile Memory”, Journal of Semiconductor Technology and Science., Vol. 8, No. 1, pp. 32-39 (2008)
4.14 M. Specht, M. Stadele, and F. Hofmann, “Simulation of high-K tunnel barriers for nonvolatile floating gate memories,” Proc. ESSDERC Conference, pp. 599-602 (2002)

5.1 G. I. Meijer, “Who Wins the Nonvolatile Memory Race?”, Science, Vol. 319, pp. 1625 (2008)
5.2 I. G. Baek, M. S. Lee, S. Seo, M. J. Lee, D. H. Seo, D.-S. Suh, J. C. Park, S. O. Park, H. S. Kim, I. K. Yoo, U-In Chung, and J. T. Moon, “Highly Scalable Non-volatile Resistive Memory using Simple Binary Oxide Driven by Asymmetric Unipolar Voltage Pulses”, Tech. Dig. - Int. Electron Devices Meet., Vol. 587 (2004)
5.3 R. Waser and M. Aono, “Nanoionics-based resistive switching memories”, Nature Mater, Vol. 6, pp. 833 (2007)
5.4 J. Rodrıguez Contreras, H. Kohlstedt, U. Poppe, R. Waser, C. Buchal, and N. A. Pertsev, “Resistive switching in metal–ferroelectric–metal junctions”, Appl. Phys. Lett., Vol. 83, No. 22, pp. 4595 (2003)
5.5 A. Beck, J. G. Bednorz, Ch. Gerber, C. Rossel, and D. Widmer, “Reproducible switching effect in thin oxide films for memory applications”, Appl. Phys. Lett., Vol. 77, No. 1, pp. 139 (2000)
5.6 Q. Ling, Y. Song, S. J. Ding, C. Zhu, D. S. H. Chan, D.-L. Kwong, E.-T. Kang, and K. G. Neoh, “Non-Volatile Polymer Memory Device Base on a Novel Copolymer of N-Vinylcarbazole and Eu-Complexed Vinylbenzoate”, Adv. Mater., Vol. 17, pp. 455 (2005)
5.7 Seunghyup Lee, Wan-Gee Kim, Shi-Woo Rhee, and Kijung Yong, “Resistance Switching Behaviors of Hafnium Oxide Films Grown by MOCVD for Nonvolatile Memory Applications”, Journal of The Electrochemical Society, Vol. 155, pp. H92-H96 (2008)
5.8 Dongsoo Lee, Dong-jun Seong, Hye jung Choi, Inhwa Jo, R. Dong ,W. Xiang, ,Seokjoon Oh, Myeongbum Pyun,Sun-ok Seo, Seongho Heo, Minseok Jo, Dae-Kyu Hwang, H. K Park, M. Chang, M. Hasan, and Hyunsang Hwang, “Excellent uniformity and reproducible resistance switching characteristics of doped binary metal oxides for non-volatile resistance memory applications”, IEDM (2006)
5.9 X. Wu, P. Zhou, J. Li, L. Y. Chen, H. B. Lv, Y. Y. Lin, and T. A. Tang,” Reproducible unipolar resistance switching in stoichiometric ZrO2 films”, Appl. Phys. Lett., Vol. 90, pp. 183507 (2007)
5.10 J.-W. Park, J.-W. Park, K. Jung, M. K. Yang, and J.-K. Lee, “Influence of oxygen content on electrical properties of NiO films grown by rf reactive sputtering for resistive random-access memory applications”, J. Vac. Sci. Technol., Vol. B 24, pp. 2205 (2006)
5.11 J. W. Seo, J. W. Park, K. S. Lim, J. H. Yang, and S. J. Kang, “Transparent resistive random access memory and its characteristics for nonvolatile resistive switching”, Appl. Phys. Lett., Vol. 93, pp. 223505 (2008)
5.12 D. S. Jeong, H. Schroeder, and R. Waser, “Impedance spectroscopy of TiO2 thin films showing resistive switching”, Appl. Phys. Lett., Vol. 89, pp. 082909 (2006)
5.13 A. Chen, S. Haddad, Y. C. Wu, Z. Lan, T. N. Fang, and S. Kaza, “Switching characteristics of Cu2O metal-insulator-metal resistive memory”, Appl. Phys. Lett., Vol. 91, pp. 123517 (2007)
5.14 C. Schindler, S. C. P. Thermadam, R. Waser, and M. N. Kozicki, “Bipolar and Unipolar Resistive Switching in Cu-Doped SiO2”, IEEE Trans. Electron Devices, Vol. 54, No. 10, pp. 2762 (2007)
5.15 H. Kim, P. Mclntyre, C. O. Chui, K. Saraswat and S. Stemmer, “Engineering chemically abrupt high-k metal oxide/silicon interfaces using an oxygen-gettering metal overlayer”, J. Appl. Phys., Vol. 96, p.3467 (2004)
5.16 C.-Y. Lin, C.-Y. Wu, C.-Y. Wu, T.-C. Lee, F.-L. Yang, C. Hu and T.-Y. Tseng, “Effect of top electrode material on resistive switching properties of ZrO2 film memory devices”, IEEE Electron Dev. Lett., Vol. 28, p.366, 2007.
5.17 S. M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, third ed., pp. 227

6.1 R. Waser and M. Aono, “Nanoionics-based resistive switching memories”, Nature Mater., Vol. 6, pp. 833 (2007)
6.2 H. Y. Lee, P. S. Chen, T. Y. Wu, Y. S. Chen, C. C. Wang, P. J. Tzeng, C. H. Lin, F. Chen, C. H. Lien, and M.-J. Tsai, “Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM”, Tech. Dig. - Int. Electron Devices Meet, Vol. 297 (2008).
6.3 G. I. Meijer, “Who Wins the Nonvolatile Memory Race?”, Science, Vol. 319, pp. 1625 (2008)
6.4 K. M. Kim, B. J. Choi, Y. C. Shin, S. Choi, and C. S. Hwang, “Anode-interface localized filamentary mechanism in resistive switching of TiO2 thin films”, Appl. Phys. Lett., Vol. 91, pp. 012907 ( 2007)
6.5 M. J. Rozenberg, I. H. Inoue, and M. J. Sanchez, “Nonvolatile Memory with Multilevel Switching: A Basic Model”, Phys. Rev. Lett., Vol. 92, pp. 178302 (2004)
6.6 T. Fujii, M. Kawasaki, A. Sawa, H. Akoh, Y. Kawazoe, and Y. Tokura, “Hysteretic current–voltage characteristics and resistance switching at an epitaxial oxide Schottky junction SrRuO3/SrTi0.99Nb0.01O3”, Appl. Phys. Lett., Vol. 86, pp. 012107 (2005)
6.7 A. Beck, J. G. Bednorz, C. Gerber, C. Rossel, and D. Widmer, “Reproducible switching effect in thin oxide films for memory applications”, Appl. Phys. Lett., Vol. 77, pp.139 (2000)
6.8 Y. B. Nian, J. Strozier, N. J. Wu, X. Chen, and A. Ignatiev, “Evidence for an Oxygen Diffusion Model for the Electric Pulse Induced Resistance Change Effect in Transition-Metal Oxides”, Phys. Rev. Lett., Vol. 98, pp. 146403 (2007)
6.9 W. Guan, M. Liu, S. Long, Q. Liu, and W. Wang, “On the resistive switching mechanisms of Cu/ZrO2:Cu/Pt”, Appl. Phys. Lett., Vol 93, pp. 223506 (2008)
6.10 Ming Liu, Z. Abid, Wei Wang, Xiaoli He, Qi Liu, and Weihua Guan, “Multilevel resistive switching with ionic and metallic filaments”, Appl. Phys. Lett., Vol. 94, pp. 233106 (2009)
6.11 H. Y. Peng, G. P. Li, J. Y. Ye, Z. P. Wei, Z. Zhang, D. D. Wang, G. Z. Xing, and T. Wu, “Electrode dependence of resistive switching in Mn-doped ZnO: Filamentary versus interfacial mechanisms”, Appl. Phys. Lett., Vol. 96, pp. 192113 (2010)
6.12 Nuo Xu, Lifeng Liu, Xiao Sun, Xiaoyan Liu, Dedong Han, Yi Wang, Ruqi Han, Jinfeng Kang, and Bin Yu, “Characteristics and mechanism of conduction/set process in TiN/ZnO/Pt resistance switching random-access memories”, Appl. Phys. Lett., Vol. 92, pp. 232112 (2008)
6.13 Min Kyu Yang, Jae-Wan Park, Tae Kuk Ko, and Jeon-Kook Lee, “Bipolar resistive switching behavior in Ti/MnO2/Pt structure for nonvolatile memory devices”, Appl. Phys. Lett., Vol. 95, pp. 042105 (2009)
6.14 S. M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, third ed., pp. 227
6.15 L. E. Yu, S. Kim, M. K. Ryu, S. Y. Choi, and Y. K. Choi, “Structure Effects on Resistive Switching of Al/TiOx/Al Devices for RRAM Applications”, IEEE Electron Device Lett., Vol. 29, pp. 331 (2008)
6.16 Jeremy M. Beebe, BongSoo Kim, J.W. Gadzuk, C. Daniel Frisbie and James G. Kushmerick, “Transition from Direct Tunneling to Field Emission in Metal-Molecule-Metal Junctions”, Phys. Rev. Lett., Vol. 97, pp. 026801 (2006)